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authorPankaj Dubey <pankaj.dubey@samsung.com>2014-09-09 17:24:57 +0530
committerTomasz Figa <tomasz.figa@gmail.com>2014-09-22 14:28:35 +0200
commit59037b92f440c10d0c717a91f0b35a49b774c708 (patch)
tree63fc060a30097c330f37eb71b98e749fe4a8508a /drivers/clk
parent5ce37f266650528978cc2fa410b45ded4fd57e1c (diff)
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clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock
Update shift and width field of div_spi0_isp clock as per Exynos3250 user manual. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/samsung/clk-exynos3250.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c
index 8c9d503fb9c6..f8bf4bf0fb08 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -424,7 +424,7 @@ static struct samsung_div_clock div_clks[] __initdata = {
DIV(CLK_DIV_SPI1_ISP, "div_spi1_isp", "mout_spi1_isp", DIV_ISP, 16, 4),
DIV_F(CLK_DIV_SPI0_ISP_PRE, "div_spi0_isp_pre", "div_spi0_isp",
DIV_ISP, 8, 8, CLK_SET_RATE_PARENT, 0),
- DIV(CLK_DIV_SPI0_ISP, "div_spi0_isp", "mout_spi0_isp", DIV_ISP, 0, 4),
+ DIV(CLK_DIV_SPI0_ISP, "div_spi0_isp", "mout_spi0_isp", DIV_ISP, 4, 4),
/* DIV_FSYS0 */
DIV_F(CLK_DIV_TSADC_PRE, "div_tsadc_pre", "div_tsadc", DIV_FSYS0, 8, 8,
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