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authorArnd Bergmann <arnd@arndb.de>2016-09-13 17:51:23 +0200
committerArnd Bergmann <arnd@arndb.de>2016-09-13 17:51:23 +0200
commit292cc1affba5295f38701caa2004b0ac8f61514e (patch)
tree893afb3fcf4057c4579455601058d5a1f5e6292e /drivers/clk/sunxi-ng/ccu_mux.c
parent3eab887a55424fc2c27553b7bfe32330df83f7b8 (diff)
parent7a988a4dd29a8cfcf405a12441533d765d25a6b8 (diff)
downloadtalos-obmc-linux-292cc1affba5295f38701caa2004b0ac8f61514e.tar.gz
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Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late
Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard: A second set of device tree changes, this time switching a few SoCs to the new sunxi-ng clock framework. We also added the support for a new SoC (NextThing GR8 and its evaluation board), and the support for the DRM driver in the A33. To maintain bisectability, while avoiding some un-trivial merge conflicts, I had to merge the clk branch that I've sent a PR to Mike and Stephen. This branch will of course be stable. * tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits) ARM: dts: gr8: Add support for the GR8 evaluation board ARM: dts: Add NextThing GR8 dtsi ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi ARM: sun8i: a23/a33: Add RGB666 pins ARM: sun8i: a33: Add display pipeline ARM: sun8i: Convert the A23 and A33 to the CCU ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings clk: sunxi-ng: Add hardware dependency clk: sunxi-ng: Add A23 CCU clk: sunxi-ng: Add A33 CCU support clk: sunxi-ng: Add N-class clocks support clk: sunxi-ng: mux: Add mux table macro clk: sunxi-ng: div: Allow to set a maximum clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure clk: sunxi-ng: div: Add mux table macros devicetree: Add vendor prefix for FriendlyARM ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2 ...
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_mux.c')
-rw-r--r--drivers/clk/sunxi-ng/ccu_mux.c56
1 files changed, 53 insertions, 3 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_mux.c b/drivers/clk/sunxi-ng/ccu_mux.c
index 58fc36e7dcce..a43ad52a957d 100644
--- a/drivers/clk/sunxi-ng/ccu_mux.c
+++ b/drivers/clk/sunxi-ng/ccu_mux.c
@@ -8,7 +8,9 @@
* the License, or (at your option) any later version.
*/
+#include <linux/clk.h>
#include <linux/clk-provider.h>
+#include <linux/delay.h>
#include "ccu_gate.h"
#include "ccu_mux.h"
@@ -18,8 +20,9 @@ void ccu_mux_helper_adjust_parent_for_prediv(struct ccu_common *common,
int parent_index,
unsigned long *parent_rate)
{
- u8 prediv = 1;
+ u16 prediv = 1;
u32 reg;
+ int i;
if (!((common->features & CCU_FEATURE_FIXED_PREDIV) ||
(common->features & CCU_FEATURE_VARIABLE_PREDIV)))
@@ -32,8 +35,9 @@ void ccu_mux_helper_adjust_parent_for_prediv(struct ccu_common *common,
}
if (common->features & CCU_FEATURE_FIXED_PREDIV)
- if (parent_index == cm->fixed_prediv.index)
- prediv = cm->fixed_prediv.div;
+ for (i = 0; i < cm->n_predivs; i++)
+ if (parent_index == cm->fixed_predivs[i].index)
+ prediv = cm->fixed_predivs[i].div;
if (common->features & CCU_FEATURE_VARIABLE_PREDIV)
if (parent_index == cm->variable_prediv.index) {
@@ -107,6 +111,15 @@ u8 ccu_mux_helper_get_parent(struct ccu_common *common,
parent = reg >> cm->shift;
parent &= (1 << cm->width) - 1;
+ if (cm->table) {
+ int num_parents = clk_hw_get_num_parents(&common->hw);
+ int i;
+
+ for (i = 0; i < num_parents; i++)
+ if (cm->table[i] == parent)
+ return i;
+ }
+
return parent;
}
@@ -117,6 +130,9 @@ int ccu_mux_helper_set_parent(struct ccu_common *common,
unsigned long flags;
u32 reg;
+ if (cm->table)
+ index = cm->table[index];
+
spin_lock_irqsave(common->lock, flags);
reg = readl(common->base + common->reg);
@@ -185,3 +201,37 @@ const struct clk_ops ccu_mux_ops = {
.determine_rate = __clk_mux_determine_rate,
.recalc_rate = ccu_mux_recalc_rate,
};
+
+/*
+ * This clock notifier is called when the frequency of the of the parent
+ * PLL clock is to be changed. The idea is to switch the parent to a
+ * stable clock, such as the main oscillator, while the PLL frequency
+ * stabilizes.
+ */
+static int ccu_mux_notifier_cb(struct notifier_block *nb,
+ unsigned long event, void *data)
+{
+ struct ccu_mux_nb *mux = to_ccu_mux_nb(nb);
+ int ret = 0;
+
+ if (event == PRE_RATE_CHANGE) {
+ mux->original_index = ccu_mux_helper_get_parent(mux->common,
+ mux->cm);
+ ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
+ mux->bypass_index);
+ } else if (event == POST_RATE_CHANGE) {
+ ret = ccu_mux_helper_set_parent(mux->common, mux->cm,
+ mux->original_index);
+ }
+
+ udelay(mux->delay_us);
+
+ return notifier_from_errno(ret);
+}
+
+int ccu_mux_notifier_register(struct clk *clk, struct ccu_mux_nb *mux_nb)
+{
+ mux_nb->clk_nb.notifier_call = ccu_mux_notifier_cb;
+
+ return clk_notifier_register(clk, &mux_nb->clk_nb);
+}
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