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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2006-09-26 17:56:55 +0100
committerVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>2006-09-26 23:05:55 -0400
commit7357db1209f27210f97b2a9dd22177f1886a1198 (patch)
treebd02a20804f36dfe87418b0fee3267d1d021b6ac /drivers/char
parentb278240839e20fa9384ea430df463b367b90e04e (diff)
downloadtalos-obmc-linux-7357db1209f27210f97b2a9dd22177f1886a1198.tar.gz
talos-obmc-linux-7357db1209f27210f97b2a9dd22177f1886a1198.zip
[AGPGART] Use pci_get_slot not pci_find_slot
Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'drivers/char')
-rw-r--r--drivers/char/agp/amd64-agp.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index 8cd52984cda5..00b17ae39736 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -409,7 +409,7 @@ static int __devinit uli_agp_init(struct pci_dev *pdev)
int i;
unsigned size = amd64_fetch_size();
printk(KERN_INFO "Setting up ULi AGP.\n");
- dev1 = pci_find_slot ((unsigned int)pdev->bus->number,PCI_DEVFN(0,0));
+ dev1 = pci_get_slot (pdev->bus,PCI_DEVFN(0,0));
if (dev1 == NULL) {
printk(KERN_INFO PFX "Detected a ULi chipset, "
"but could not fine the secondary device.\n");
@@ -442,6 +442,8 @@ static int __devinit uli_agp_init(struct pci_dev *pdev)
enuscr= httfea+ (size * 1024 * 1024) - 1;
pci_write_config_dword(dev1, ULI_X86_64_HTT_FEA_REG, httfea);
pci_write_config_dword(dev1, ULI_X86_64_ENU_SCR_REG, enuscr);
+
+ pci_dev_put(dev1);
return 0;
}
@@ -466,7 +468,7 @@ static int __devinit nforce3_agp_init(struct pci_dev *pdev)
printk(KERN_INFO PFX "Setting up Nforce3 AGP.\n");
- dev1 = pci_find_slot((unsigned int)pdev->bus->number, PCI_DEVFN(11, 0));
+ dev1 = pci_get_slot(pdev->bus, PCI_DEVFN(11, 0));
if (dev1 == NULL) {
printk(KERN_INFO PFX "agpgart: Detected an NVIDIA "
"nForce3 chipset, but could not find "
@@ -510,6 +512,8 @@ static int __devinit nforce3_agp_init(struct pci_dev *pdev)
pci_write_config_dword(dev1, NVIDIA_X86_64_1_APBASE2, apbase);
pci_write_config_dword(dev1, NVIDIA_X86_64_1_APLIMIT2, aplimit);
+ pci_dev_put(dev1);
+
return 0;
}
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