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authorBen Dooks <ben-linux@fluff.org>2008-12-12 00:24:33 +0000
committerBen Dooks <ben-linux@fluff.org>2009-02-26 23:08:59 +0000
commit28fd2d397bab5c7fb0eed0c20b6766c99ae34a8f (patch)
treec43033eed4d37a6f143da5f8c38e791e3ad86e42 /arch
parent20f4d6c3a2a23c5d7d9cc7f42fbb943ca7a03d1f (diff)
downloadtalos-obmc-linux-28fd2d397bab5c7fb0eed0c20b6766c99ae34a8f.tar.gz
talos-obmc-linux-28fd2d397bab5c7fb0eed0c20b6766c99ae34a8f.zip
[ARM] S3C64XX: Set GPIO pin when select IRQ_EINT type
Set the GPIO pin mode to external interrupt when configuring an IRQ_EINT's IRQ type. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-s3c64xx/irq-eint.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index 1f7cc0067f5c..5d62f2799ea9 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -14,12 +14,15 @@
#include <linux/kernel.h>
#include <linux/interrupt.h>
+#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/hardware/vic.h>
#include <plat/regs-irqtype.h>
+#include <plat/regs-gpio.h>
+#include <plat/gpio-cfg.h>
#include <mach/map.h>
#include <plat/cpu.h>
@@ -74,6 +77,7 @@ static void s3c_irq_eint_maskack(unsigned int irq)
static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
{
int offs = eint_offset(irq);
+ int pin;
int shift;
u32 ctrl, mask;
u32 newvalue = 0;
@@ -125,6 +129,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type)
ctrl |= newvalue << shift;
__raw_writel(ctrl, reg);
+ /* set the GPIO pin appropriately */
+
+ if (offs < 23)
+ pin = S3C64XX_GPN(offs);
+ else
+ pin = S3C64XX_GPM(offs - 23);
+
+ s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2));
+
return 0;
}
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