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| author | Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> | 2013-08-05 12:59:19 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2013-08-07 15:57:33 +0200 |
| commit | 027664216d37afe80101de91f73dfbaf6b36ee65 (patch) | |
| tree | ceca9fe0c20332082886962987d54ed3c3679ba5 /arch/x86 | |
| parent | 205befd9a5c701b56f569434045821f413f08f6d (diff) | |
| download | talos-obmc-linux-027664216d37afe80101de91f73dfbaf6b36ee65.tar.gz talos-obmc-linux-027664216d37afe80101de91f73dfbaf6b36ee65.zip | |
KVM: MMU: fix check the reserved bits on the gpte of L2
Current code always uses arch.mmu to check the reserved bits on guest gpte
which is valid only for L1 guest, we should use arch.nested_mmu instead when
we translate gva to gpa for the L2 guest
Fix it by using @mmu instead since it is adapted to the current mmu mode
automatically
The bug can be triggered when nested npt is used and L1 guest and L2 guest
use different mmu mode
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kvm/paging_tmpl.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h index 7769699d48a8..3a75828be29b 100644 --- a/arch/x86/kvm/paging_tmpl.h +++ b/arch/x86/kvm/paging_tmpl.h @@ -218,8 +218,7 @@ retry_walk: if (unlikely(!is_present_gpte(pte))) goto error; - if (unlikely(is_rsvd_bits_set(&vcpu->arch.mmu, pte, - walker->level))) { + if (unlikely(is_rsvd_bits_set(mmu, pte, walker->level))) { errcode |= PFERR_RSVD_MASK | PFERR_PRESENT_MASK; goto error; } |
