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| author | David Woodhouse <David.Woodhouse@intel.com> | 2009-12-08 09:58:33 +0000 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-12-08 09:59:24 +0000 |
| commit | ec208491936d6adb8a70c3dd4a517cdfe54e823d (patch) | |
| tree | c7291450e8e559c5fbf3360df30999432204af3c /arch/x86/mm/setup_nx.c | |
| parent | aa697079ee66315c4b9747a5eb3e48487fb1b8be (diff) | |
| parent | 7b626acb8f983eb83b396ab96cc24b18d635d487 (diff) | |
| download | talos-obmc-linux-ec208491936d6adb8a70c3dd4a517cdfe54e823d.tar.gz talos-obmc-linux-ec208491936d6adb8a70c3dd4a517cdfe54e823d.zip | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Merge the BIOS workarounds from 2.6.32, and the swiotlb fallback on failure.
Diffstat (limited to 'arch/x86/mm/setup_nx.c')
| -rw-r--r-- | arch/x86/mm/setup_nx.c | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/x86/mm/setup_nx.c b/arch/x86/mm/setup_nx.c new file mode 100644 index 000000000000..513d8ed5d2ec --- /dev/null +++ b/arch/x86/mm/setup_nx.c @@ -0,0 +1,69 @@ +#include <linux/spinlock.h> +#include <linux/errno.h> +#include <linux/init.h> + +#include <asm/pgtable.h> + +int nx_enabled; + +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) +static int disable_nx __cpuinitdata; + +/* + * noexec = on|off + * + * Control non-executable mappings for processes. + * + * on Enable + * off Disable + */ +static int __init noexec_setup(char *str) +{ + if (!str) + return -EINVAL; + if (!strncmp(str, "on", 2)) { + __supported_pte_mask |= _PAGE_NX; + disable_nx = 0; + } else if (!strncmp(str, "off", 3)) { + disable_nx = 1; + __supported_pte_mask &= ~_PAGE_NX; + } + return 0; +} +early_param("noexec", noexec_setup); +#endif + +#ifdef CONFIG_X86_PAE +void __init set_nx(void) +{ + unsigned int v[4], l, h; + + if (cpu_has_pae && (cpuid_eax(0x80000000) > 0x80000001)) { + cpuid(0x80000001, &v[0], &v[1], &v[2], &v[3]); + + if ((v[3] & (1 << 20)) && !disable_nx) { + rdmsr(MSR_EFER, l, h); + l |= EFER_NX; + wrmsr(MSR_EFER, l, h); + nx_enabled = 1; + __supported_pte_mask |= _PAGE_NX; + } + } +} +#else +void set_nx(void) +{ +} +#endif + +#ifdef CONFIG_X86_64 +void __cpuinit check_efer(void) +{ + unsigned long efer; + + rdmsrl(MSR_EFER, efer); + if (!(efer & EFER_NX) || disable_nx) + __supported_pte_mask &= ~_PAGE_NX; +} +#endif + |
