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author | Ingo Molnar <mingo@elte.hu> | 2008-10-10 09:25:29 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-10-10 09:25:29 +0200 |
commit | 8eb95f28f66b1a5461fdbcc9a1ee9068fb2cf2b6 (patch) | |
tree | e42d0e004b07f86d38de930fc163f3ca7d121f9c /arch/x86/kernel/process.c | |
parent | d7451fca18e2ec62641ae4bbfe946069f13765a3 (diff) | |
parent | 3fa8749e584b55f1180411ab1b51117190bac1e5 (diff) | |
download | talos-obmc-linux-8eb95f28f66b1a5461fdbcc9a1ee9068fb2cf2b6.tar.gz talos-obmc-linux-8eb95f28f66b1a5461fdbcc9a1ee9068fb2cf2b6.zip |
Merge commit 'v2.6.27' into timers/hpet
Diffstat (limited to 'arch/x86/kernel/process.c')
-rw-r--r-- | arch/x86/kernel/process.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 7fc4d5b0a6a0..876e91890777 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -246,6 +246,14 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c) return 1; } +static cpumask_t c1e_mask = CPU_MASK_NONE; +static int c1e_detected; + +void c1e_remove_cpu(int cpu) +{ + cpu_clear(cpu, c1e_mask); +} + /* * C1E aware idle routine. We check for C1E active in the interrupt * pending message MSR. If we detect C1E, then we handle it the same @@ -253,9 +261,6 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c) */ static void c1e_idle(void) { - static cpumask_t c1e_mask = CPU_MASK_NONE; - static int c1e_detected; - if (need_resched()) return; @@ -265,8 +270,10 @@ static void c1e_idle(void) rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi); if (lo & K8_INTP_C1E_ACTIVE_MASK) { c1e_detected = 1; - mark_tsc_unstable("TSC halt in C1E"); - printk(KERN_INFO "System has C1E enabled\n"); + if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) + mark_tsc_unstable("TSC halt in AMD C1E"); + printk(KERN_INFO "System has AMD C1E enabled\n"); + set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E); } } |