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author | Paul Mundt <lethal@linux-sh.org> | 2009-08-15 11:05:42 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-15 11:05:42 +0900 |
commit | ecba1060583635ab55092072441ff903b5e9a659 (patch) | |
tree | d84dc75eae0b1bb2a2751240783444e2e92ca695 /arch/sh/include | |
parent | e82da214d2fe3dc2610df966100c4f36bc0fad91 (diff) | |
download | talos-obmc-linux-ecba1060583635ab55092072441ff903b5e9a659.tar.gz talos-obmc-linux-ecba1060583635ab55092072441ff903b5e9a659.zip |
sh: Centralize the CPU cache initialization routines.
This provides a central point for CPU cache initialization routines.
This replaces the antiquated p3_cache_init() method, which the vast
majority of CPUs never cared about.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include')
-rw-r--r-- | arch/sh/include/asm/cacheflush.h | 3 | ||||
-rw-r--r-- | arch/sh/include/cpu-common/cpu/cacheflush.h | 2 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh2a/cpu/cacheflush.h | 1 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh3/cpu/cacheflush.h | 2 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/cacheflush.h | 3 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh5/cpu/cacheflush.h | 1 |
6 files changed, 2 insertions, 10 deletions
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h index 9ec13fb909dd..e37654f7f545 100644 --- a/arch/sh/include/asm/cacheflush.h +++ b/arch/sh/include/asm/cacheflush.h @@ -12,7 +12,6 @@ * * See arch/sh/kernel/cpu/init.c:cache_init(). */ -#define p3_cache_init() do { } while (0) #define flush_cache_all() do { } while (0) #define flush_cache_mm(mm) do { } while (0) #define flush_cache_dup_mm(mm) do { } while (0) @@ -78,5 +77,7 @@ void kunmap_coherent(void); #define PG_dcache_dirty PG_arch_1 +void cpu_cache_init(void); + #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-common/cpu/cacheflush.h b/arch/sh/include/cpu-common/cpu/cacheflush.h index c3db00b73605..0c38278509cb 100644 --- a/arch/sh/include/cpu-common/cpu/cacheflush.h +++ b/arch/sh/include/cpu-common/cpu/cacheflush.h @@ -39,6 +39,4 @@ #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) #define flush_cache_sigtramp(vaddr) do { } while (0) -#define p3_cache_init() do { } while (0) - #endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h b/arch/sh/include/cpu-sh2a/cpu/cacheflush.h index 3d3b9205d2ac..b9eaa19325e2 100644 --- a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h +++ b/arch/sh/include/cpu-sh2a/cpu/cacheflush.h @@ -30,5 +30,4 @@ void flush_icache_range(unsigned long start, unsigned long end); #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) #define flush_cache_sigtramp(vaddr) do { } while (0) -#define p3_cache_init() do { } while (0) #endif /* __ASM_CPU_SH2A_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-sh3/cpu/cacheflush.h b/arch/sh/include/cpu-sh3/cpu/cacheflush.h index 3b5f3df4e1c8..cf656a093770 100644 --- a/arch/sh/include/cpu-sh3/cpu/cacheflush.h +++ b/arch/sh/include/cpu-sh3/cpu/cacheflush.h @@ -32,8 +32,6 @@ void flush_icache_page(struct vm_area_struct *vma, struct page *page); #define flush_cache_sigtramp(vaddr) do { } while (0) #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define p3_cache_init() do { } while (0) - #else #include <cpu-common/cpu/cacheflush.h> #endif diff --git a/arch/sh/include/cpu-sh4/cpu/cacheflush.h b/arch/sh/include/cpu-sh4/cpu/cacheflush.h index 76764f0fb88a..a28c542f5179 100644 --- a/arch/sh/include/cpu-sh4/cpu/cacheflush.h +++ b/arch/sh/include/cpu-sh4/cpu/cacheflush.h @@ -35,7 +35,4 @@ void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, #define flush_icache_page(vma,pg) do { } while (0) -/* Initialization of P3 area for copy_user_page */ -void p3_cache_init(void); - #endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-sh5/cpu/cacheflush.h b/arch/sh/include/cpu-sh5/cpu/cacheflush.h index 5a11f0b7e66a..8350cc7ed1c5 100644 --- a/arch/sh/include/cpu-sh5/cpu/cacheflush.h +++ b/arch/sh/include/cpu-sh5/cpu/cacheflush.h @@ -25,7 +25,6 @@ extern void flush_icache_user_range(struct vm_area_struct *vma, #define flush_dcache_mmap_unlock(mapping) do { } while (0) #define flush_icache_page(vma, page) do { } while (0) -void p3_cache_init(void); #endif /* __ASSEMBLY__ */ |