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authorLEROY Christophe <christophe.leroy@c-s.fr>2015-05-19 12:07:50 +0200
committerScott Wood <scottwood@freescale.com>2015-08-07 22:59:21 -0500
commit5b2a32e806342f237f68435a50e1071f7f32b5c5 (patch)
treeab35d6e9fe821c2cdd90d8bdbfce68cddae8c5a8 /arch/powerpc/lib/copy_32.S
parentdf087e450d7ddc0b15bd8824206d964720b4f5e4 (diff)
downloadtalos-obmc-linux-5b2a32e806342f237f68435a50e1071f7f32b5c5.tar.gz
talos-obmc-linux-5b2a32e806342f237f68435a50e1071f7f32b5c5.zip
powerpc/32: memset(0): use cacheable_memzero
cacheable_memzero uses dcbz instruction and is more efficient than memset(0) when the destination is in RAM This patch renames memset as generic_memset, and defines memset as a prolog to cacheable_memzero. This prolog checks if the byte to set is 0. If not, it falls back to generic_memcpy() cacheable_memzero disappears as it is not referenced anywhere anymore Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/lib/copy_32.S')
-rw-r--r--arch/powerpc/lib/copy_32.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32.S
index 55f19f9fd708..0b4f954961bf 100644
--- a/arch/powerpc/lib/copy_32.S
+++ b/arch/powerpc/lib/copy_32.S
@@ -74,9 +74,9 @@ CACHELINE_MASK = (L1_CACHE_BYTES-1)
* to set them to zero. This requires that the destination
* area is cacheable. -- paulus
*/
-_GLOBAL(cacheable_memzero)
- mr r5,r4
- li r4,0
+_GLOBAL(memset)
+ cmplwi r4,0
+ bne- generic_memset
addi r6,r3,-4
cmplwi 0,r5,4
blt 7f
@@ -117,7 +117,7 @@ _GLOBAL(cacheable_memzero)
bdnz 8b
blr
-_GLOBAL(memset)
+_GLOBAL(generic_memset)
rlwimi r4,r4,8,16,23
rlwimi r4,r4,16,0,15
addi r6,r3,-4
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