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author | Stephen Rothwell <sfr@canb.auug.org.au> | 2008-04-10 16:43:47 +1000 |
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committer | Paul Mackerras <paulus@samba.org> | 2008-04-15 21:21:25 +1000 |
commit | 30ff2e87ed55e83b4eb436f5f14a7e49ff81ad99 (patch) | |
tree | 9e1af946cb836c9af2059d4f8b41aa89dd3b780e /arch/powerpc/kernel/paca.c | |
parent | 3eb9cf076180ed2003db77bd2c33ac4ed0211089 (diff) | |
download | talos-obmc-linux-30ff2e87ed55e83b4eb436f5f14a7e49ff81ad99.tar.gz talos-obmc-linux-30ff2e87ed55e83b4eb436f5f14a7e49ff81ad99.zip |
[POWERPC] iSeries: Make iseries_reg_save private to iSeries
Now that we have the alpaca, the reg_save_ptr is no longer needed in the
paca. Eradicate all global uses of it and make it static in the iSeries
lpardata.c
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/paca.c')
-rw-r--r-- | arch/powerpc/kernel/paca.c | 33 |
1 files changed, 8 insertions, 25 deletions
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c index 55f1a25085cd..867b22d17385 100644 --- a/arch/powerpc/kernel/paca.c +++ b/arch/powerpc/kernel/paca.c @@ -15,7 +15,6 @@ #include <asm/ptrace.h> #include <asm/page.h> #include <asm/lppaca.h> -#include <asm/iseries/it_lp_reg_save.h> #include <asm/paca.h> #include <asm/mmu.h> @@ -25,13 +24,13 @@ extern unsigned long __toc_start; /* - * iSeries structure which the hypervisor knows about - this structure + * The structure which the hypervisor knows about - this structure * should not cross a page boundary. The vpa_init/register_vpa call * is now known to fail if the lppaca structure crosses a page - * boundary. The lppaca is also used on POWER5 pSeries boxes. The - * lppaca is 640 bytes long, and cannot readily change since the - * hypervisor knows its layout, so a 1kB alignment will suffice to - * ensure that it doesn't cross a page boundary. + * boundary. The lppaca is also used on legacy iSeries and POWER5 + * pSeries boxes. The lppaca is 640 bytes long, and cannot readily + * change since the hypervisor knows its layout, so a 1kB alignment + * will suffice to ensure that it doesn't cross a page boundary. */ struct lppaca lppaca[] = { [0 ... (NR_CPUS-1)] = { @@ -66,32 +65,16 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = { * processors. The processor VPD array needs one entry per physical * processor (not thread). */ -#define PACA_INIT_COMMON(number) \ +#define PACA_INIT(number) \ +{ \ .lppaca_ptr = &lppaca[number], \ .lock_token = 0x8000, \ .paca_index = (number), /* Paca Index */ \ .kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \ .hw_cpu_id = 0xffff, \ - .slb_shadow_ptr = &slb_shadow[number], - -#ifdef CONFIG_PPC_ISERIES -#define PACA_INIT_ISERIES(number) \ - .reg_save_ptr = &iseries_reg_save[number], - -#define PACA_INIT(number) \ -{ \ - PACA_INIT_COMMON(number) \ - PACA_INIT_ISERIES(number) \ + .slb_shadow_ptr = &slb_shadow[number], \ } -#else -#define PACA_INIT(number) \ -{ \ - PACA_INIT_COMMON(number) \ -} - -#endif - struct paca_struct paca[] = { PACA_INIT(0), #if NR_CPUS > 1 |