diff options
| author | David Gibson <david@gibson.dropbear.id.au> | 2005-11-24 16:34:45 +1100 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-01-09 14:50:32 +1100 |
| commit | 1888e7b51c0cb5db49911b59cb758ad2c7a530f2 (patch) | |
| tree | dab7d7cbb895658845dce88f1b2bacc0f7238e50 /arch/powerpc/kernel/paca.c | |
| parent | 456752f7505ef8f580ffd157558e661da2767d99 (diff) | |
| download | talos-obmc-linux-1888e7b51c0cb5db49911b59cb758ad2c7a530f2.tar.gz talos-obmc-linux-1888e7b51c0cb5db49911b59cb758ad2c7a530f2.zip | |
[PATCH] powerpc: Remove ItLpRegSave area from the paca
On iSeries, the paca contains, amongst other things an ItLpRegSave
structure used by the hypervisor to save registers. The hypervisor
locates this area through a pointer at the beginning of the paca, so
the structure itself can be located elsewhere. This patch moves the
reg_save area out into its own array. This reduces the amount of
iSeries specific gunk which is visible to general powerpc code via
paca.h
Built and booted on POWER5 LPAR and iSeries RS64.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/paca.c')
| -rw-r--r-- | arch/powerpc/kernel/paca.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c index a7b68f911eb1..25420406c8c0 100644 --- a/arch/powerpc/kernel/paca.c +++ b/arch/powerpc/kernel/paca.c @@ -17,6 +17,7 @@ #include <asm/page.h> #include <asm/lppaca.h> #include <asm/iseries/it_lp_queue.h> +#include <asm/iseries/it_lp_reg_save.h> #include <asm/paca.h> @@ -26,8 +27,7 @@ extern unsigned long __toc_start; /* The Paca is an array with one entry per processor. Each contains an * lppaca, which contains the information shared between the - * hypervisor and Linux. Each also contains an ItLpRegSave area which - * is used by the hypervisor to save registers. + * hypervisor and Linux. * On systems with hardware multi-threading, there are two threads * per processor. The Paca array must contain an entry for each thread. * The VPD Areas will give a max logical processors = 2 * max physical @@ -57,11 +57,7 @@ extern unsigned long __toc_start; #ifdef CONFIG_PPC_ISERIES #define PACA_INIT_ISERIES(number) \ .lppaca_ptr = &paca[number].lppaca, \ - .reg_save_ptr = &paca[number].reg_save, \ - .reg_save = { \ - .xDesc = 0xd397d9e2, /* "LpRS" */ \ - .xSize = sizeof(struct ItLpRegSave) \ - } + .reg_save_ptr = &iseries_reg_save[number], #define PACA_INIT(number) \ { \ |
