diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-29 14:06:55 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-29 14:06:55 -0700 |
commit | 82798a17ad40df827d465329a20ace80497f9b32 (patch) | |
tree | 449ba69dc5a5e19a56b2a9d12d218f9486e5316d /arch/mips/tx4938/toshiba_rbtx4938/setup.c | |
parent | db8185360d91c01f6e482db5ee402c0ad90dec52 (diff) | |
parent | 1a3b7920fe55247d39c3e1ac1e9b8aca607d0188 (diff) | |
download | talos-obmc-linux-82798a17ad40df827d465329a20ace80497f9b32.tar.gz talos-obmc-linux-82798a17ad40df827d465329a20ace80497f9b32.zip |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (34 commits)
[MIPS] tb0219: Update copyright message.
[MIPS] MT: Fix bug in multithreaded kernels.
[MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs.
Author: Ralf Baechle <ralf@linux-mips.org>
[MIPS] sb1250: Enable GenBus IDE in defconfig.
[MIPS] vmlinux.ld.S: correctly indent .data section
[MIPS] c-r3k: Implement flush_cache_range()
[MIPS] Store sign-extend register values for PTRACE_GETREGS
[MIPS] Alchemy: Register platform devices
[MIPS] Add len and addr validation for MAP_FIXED mappings.
[MIPS] IRIX: Fix off-by-one error in signal compat code.
[MIPS] time: Replace plat_timer_setup with modern APIs.
[MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.
[MIPS] time: Make c0_compare_int_usable faster
[MIPS] time: Fix cevt-r4k.c for 64-bit kernel
[MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().
[MIPS] txx9tmr clockevent/clocksource driver
[MIPS] Add mips_hpt_frequency check to mips_clockevent_init().
[MIPS] IP32: Fixes after interrupt renumbering.
[MIPS] IP27: Fix slice logic to work for arbitrary number of slices.
...
Diffstat (limited to 'arch/mips/tx4938/toshiba_rbtx4938/setup.c')
-rw-r--r-- | arch/mips/tx4938/toshiba_rbtx4938/setup.c | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c index ceecaf498957..4a8152375efe 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c @@ -26,6 +26,7 @@ #include <asm/reboot.h> #include <asm/irq.h> #include <asm/time.h> +#include <asm/txx9tmr.h> #include <asm/uaccess.h> #include <asm/io.h> #include <asm/bootinfo.h> @@ -773,15 +774,8 @@ void __init tx4938_board_setup(void) } /* TMR */ - /* disable all timers */ - for (i = 0; i < TX4938_NR_TMR; i++) { - tx4938_tmrptr(i)->tcr = 0x00000020; - tx4938_tmrptr(i)->tisr = 0; - tx4938_tmrptr(i)->cpra = 0xffffffff; - tx4938_tmrptr(i)->itmr = 0; - tx4938_tmrptr(i)->ccdr = 0; - tx4938_tmrptr(i)->pgmr = 0; - } + for (i = 0; i < TX4938_NR_TMR; i++) + txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL); /* enable DMA */ TX4938_WR64(0xff1fb150, TX4938_DMA_MCR_MSTEN); @@ -852,12 +846,13 @@ void tx4938_report_pcic_status(void) #endif /* CONFIG_PCI */ -/* We use onchip r4k counter or TMR timer as our system wide timer - * interrupt running at 100HZ. */ - void __init plat_time_init(void) { mips_hpt_frequency = txx9_cpu_clock / 2; + if (tx4938_ccfgptr->ccfg & TX4938_CCFG_TINTDIS) + txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL, + TXX9_IRQ_BASE + TX4938_IR_TMR(0), + txx9_gbus_clock / 2); } void __init toshiba_rbtx4938_setup(void) |