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author | Huacai Chen <chenhc@lemote.com> | 2014-06-26 11:41:27 +0800 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 21:46:00 +0200 |
commit | 140e39c1e3d29f50e161f55cca60f60b80408c2a (patch) | |
tree | cf4fc2a0a1896dd80667ead4382012c308ba73ca /arch/mips/loongson/common/pm.c | |
parent | bda4584cd943d7bb6cf677a8d694700c1984cf3e (diff) | |
download | talos-obmc-linux-140e39c1e3d29f50e161f55cca60f60b80408c2a.tar.gz talos-obmc-linux-140e39c1e3d29f50e161f55cca60f60b80408c2a.zip |
MIPS: Loongson: Modify ChipConfig register definition
This patch is prepared for Multi-chip interconnection. Since each chip
has a ChipConfig register, LOONGSON_CHIPCFG should be an array.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7185/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson/common/pm.c')
-rw-r--r-- | arch/mips/loongson/common/pm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/loongson/common/pm.c b/arch/mips/loongson/common/pm.c index f55e07aee071..a6b67ccfc811 100644 --- a/arch/mips/loongson/common/pm.c +++ b/arch/mips/loongson/common/pm.c @@ -79,7 +79,7 @@ int __weak wakeup_loongson(void) static void wait_for_wakeup_events(void) { while (!wakeup_loongson()) - LOONGSON_CHIPCFG0 &= ~0x7; + LOONGSON_CHIPCFG(0) &= ~0x7; } /* @@ -102,15 +102,15 @@ static void loongson_suspend_enter(void) stop_perf_counters(); - cached_cpu_freq = LOONGSON_CHIPCFG0; + cached_cpu_freq = LOONGSON_CHIPCFG(0); /* Put CPU into wait mode */ - LOONGSON_CHIPCFG0 &= ~0x7; + LOONGSON_CHIPCFG(0) &= ~0x7; /* wait for the given events to wakeup cpu from wait mode */ wait_for_wakeup_events(); - LOONGSON_CHIPCFG0 = cached_cpu_freq; + LOONGSON_CHIPCFG(0) = cached_cpu_freq; mmiowb(); } |