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author | Paul Burton <paul.burton@imgtec.com> | 2014-03-03 12:08:40 +0000 |
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committer | Paul Burton <paul.burton@imgtec.com> | 2014-05-28 16:20:14 +0100 |
commit | e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce (patch) | |
tree | fdf4723703809f156461e58305a66817339c10c9 /arch/mips/include/asm/pgtable.h | |
parent | 76ae658465c2319a63f3814b1e1e6e0664a1f542 (diff) | |
download | talos-obmc-linux-e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce.tar.gz talos-obmc-linux-e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce.zip |
MIPS: add kmap_noncoherent to wire a cached non-coherent TLB entry
This is identical to kmap_coherent apart from the cache coherency
attribute used for the TLB entry, so kmap_coherent is abstracted to
kmap_prot which is then called for both kmap_coherent &
kmap_noncoherent. This will be used by a subsequent patch.
Suggested-by: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm/pgtable.h')
-rw-r--r-- | arch/mips/include/asm/pgtable.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index 008324d1c261..539ddd148bbb 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h @@ -32,6 +32,8 @@ struct vm_area_struct; _page_cachable_default) #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ _PAGE_GLOBAL | _page_cachable_default) +#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ + _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT) #define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \ _page_cachable_default) #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ |