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authorMaxime Bizon <mbizon@freebox.fr>2011-11-04 19:09:26 +0100
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 22:03:02 +0000
commit455a503f4cd4971b26e431904d98fdf5beea1075 (patch)
treeb8c2cd3127621c774280130d315f2cf5b8d96ef2 /arch/mips/include/asm/mach-bcm63xx
parent5611cc4572e889b62a7b4c72a413536bf6a9c416 (diff)
downloadtalos-obmc-linux-455a503f4cd4971b26e431904d98fdf5beea1075.tar.gz
talos-obmc-linux-455a503f4cd4971b26e431904d98fdf5beea1075.zip
MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping.
Internal SOC registers can be directly accessed, no need to waste a TLB entry. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2890/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-bcm63xx')
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/ioremap.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-bcm63xx/ioremap.h b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
new file mode 100644
index 000000000000..e3fe04dc50bd
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
@@ -0,0 +1,38 @@
+#ifndef BCM63XX_IOREMAP_H_
+#define BCM63XX_IOREMAP_H_
+
+#include <bcm63xx_cpu.h>
+
+static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+ return phys_addr;
+}
+
+static inline int is_bcm63xx_internal_registers(phys_t offset)
+{
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6338_CPU_ID:
+ case BCM6345_CPU_ID:
+ case BCM6348_CPU_ID:
+ case BCM6358_CPU_ID:
+ if (offset >= 0xfff00000)
+ return 1;
+ break;
+ }
+ return 0;
+}
+
+static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
+ unsigned long flags)
+{
+ if (is_bcm63xx_internal_registers(offset))
+ return (void __iomem *)offset;
+ return NULL;
+}
+
+static inline int plat_iounmap(const volatile void __iomem *addr)
+{
+ return is_bcm63xx_internal_registers((unsigned long)addr);
+}
+
+#endif /* BCM63XX_IOREMAP_H_ */
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