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authorLinus Torvalds <torvalds@linux-foundation.org>2016-04-04 16:53:26 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-04-04 16:53:26 -0700
commitc3b1feb024d1a3997a3e689711283c38bb05075e (patch)
treee08830905016227812095b09ee4d64cea5a7024f /arch/mips/ath79/clock.c
parent93e2aeaca520743d66ec66b757db3a3e27936e91 (diff)
parent3d50a7fb42992545e45e10b068406546ea699489 (diff)
downloadtalos-obmc-linux-c3b1feb024d1a3997a3e689711283c38bb05075e.tar.gz
talos-obmc-linux-c3b1feb024d1a3997a3e689711283c38bb05075e.zip
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "This is the first round of MIPS fixes for 4.6: - Fix spelling mistakes all over arch/mips - Provide __bswapsi2 so XZ kernel compression will build with older GCC - ATH79 clock fixes. - Fix clock-rated copy-paste erros in ATH79 DTS. - Fix gisb-arb compatible string for 7435 BMIPS - Enable NAND and UBIFS support in CI20. - Fix BUG() assertion caused by inapropriate smp_processor_id() use. - Fix exception handling issues for the sake of debuggers - Fix the last remaining instance of irq_to_gpio in the db1xxx_ss PCMCIA code - Fix MSA unaligned load failures - Panic if kernel is configured for a not TLB-supported page size - Bail out on unsupported relocs in modules. - Partial fix for Qemu breakage after recent IPI rewrite - Wire up the preadv2 and pwrite2 syscalls - Fix the ar724x clock calculation" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: traps.c: Verify the ISA for microMIPS RDHWR emulation MIPS: BMIPS: Fix gisb-arb compatible string for 7435 MIPS: Bail on unsupported module relocs MIPS: dts: qca: ar9132_tl_wr1043nd_v1.dts: use "ref" for reference clock name MIPS: ath79: Fix the ar913x reference clock rate MIPS: ath79: Fix the ar724x clock calculation dt-bindings: clock: qca,ath79-pll: fix copy-paste typos MIPS: traps: Correct the SIGTRAP debug ABI in `do_watch' and `do_trap_or_bp' FIRMWARE: Broadcom: Fix grammar of warning messages in bcm47xx_sprom.c. MIPS: ci20: Enable NAND and UBIFS support in defconfig. MIPS: Fix misspellings in comments. MIPS: tlb-r4k: panic if the MMU doesn't support PAGE_SIZE MIPS: zboot: Remove copied source files on clean MIPS: zboot: Fix the build with XZ compression on older GCC versions MIPS: Wire up preadv2 and pwrite2 syscalls. MIPS: cpu_name_string: Use raw_smp_processor_id(). pcmcia: db1xxx_ss: fix last irq_to_gpio user MIPS: Fix MSA ld unaligned failure cases MIPS: Fix broken malta qemu
Diffstat (limited to 'arch/mips/ath79/clock.c')
-rw-r--r--arch/mips/ath79/clock.c44
1 files changed, 4 insertions, 40 deletions
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index eb5117ced95a..618dfd735eed 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -26,8 +26,7 @@
#include "common.h"
#define AR71XX_BASE_FREQ 40000000
-#define AR724X_BASE_FREQ 5000000
-#define AR913X_BASE_FREQ 5000000
+#define AR724X_BASE_FREQ 40000000
static struct clk *clks[3];
static struct clk_onecell_data clk_data = {
@@ -103,8 +102,8 @@ static void __init ar724x_clocks_init(void)
div = ((pll >> AR724X_PLL_FB_SHIFT) & AR724X_PLL_FB_MASK);
freq = div * ref_rate;
- div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);
- freq *= div;
+ div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK) * 2;
+ freq /= div;
cpu_rate = freq;
@@ -123,39 +122,6 @@ static void __init ar724x_clocks_init(void)
clk_add_alias("uart", NULL, "ahb", NULL);
}
-static void __init ar913x_clocks_init(void)
-{
- unsigned long ref_rate;
- unsigned long cpu_rate;
- unsigned long ddr_rate;
- unsigned long ahb_rate;
- u32 pll;
- u32 freq;
- u32 div;
-
- ref_rate = AR913X_BASE_FREQ;
- pll = ath79_pll_rr(AR913X_PLL_REG_CPU_CONFIG);
-
- div = ((pll >> AR913X_PLL_FB_SHIFT) & AR913X_PLL_FB_MASK);
- freq = div * ref_rate;
-
- cpu_rate = freq;
-
- div = ((pll >> AR913X_DDR_DIV_SHIFT) & AR913X_DDR_DIV_MASK) + 1;
- ddr_rate = freq / div;
-
- div = (((pll >> AR913X_AHB_DIV_SHIFT) & AR913X_AHB_DIV_MASK) + 1) * 2;
- ahb_rate = cpu_rate / div;
-
- ath79_add_sys_clkdev("ref", ref_rate);
- clks[0] = ath79_add_sys_clkdev("cpu", cpu_rate);
- clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate);
- clks[2] = ath79_add_sys_clkdev("ahb", ahb_rate);
-
- clk_add_alias("wdt", NULL, "ahb", NULL);
- clk_add_alias("uart", NULL, "ahb", NULL);
-}
-
static void __init ar933x_clocks_init(void)
{
unsigned long ref_rate;
@@ -443,10 +409,8 @@ void __init ath79_clocks_init(void)
{
if (soc_is_ar71xx())
ar71xx_clocks_init();
- else if (soc_is_ar724x())
+ else if (soc_is_ar724x() || soc_is_ar913x())
ar724x_clocks_init();
- else if (soc_is_ar913x())
- ar913x_clocks_init();
else if (soc_is_ar933x())
ar933x_clocks_init();
else if (soc_is_ar934x())
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