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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-21 19:15:03 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-21 19:15:03 -0700 |
commit | 06930b94d19a8641f8a2dc9d6ec27e2a5a39d17c (patch) | |
tree | 0672b1c9181fa7e1484c511d87d1ed29acfa0650 /arch/m68k/platform/coldfire/intc-5249.c | |
parent | 2e321806b681b1920b6dfa7d81bbe3d312fe1d19 (diff) | |
parent | 7094ac08cb9568a3efa1e3da177350e168c5fd96 (diff) | |
download | talos-obmc-linux-06930b94d19a8641f8a2dc9d6ec27e2a5a39d17c.tar.gz talos-obmc-linux-06930b94d19a8641f8a2dc9d6ec27e2a5a39d17c.zip |
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu tree from Greg Ungerer:
"More merge and clean up of MMU and non-MMU common files, namely
signal.c and dma.c. There is also a simplification of the ColdFire
GPIO setup tables. Using a couple of simple macros we make the init
tables really small and easy to read, and save a couple of thousand
lines of code. Also a move of all the ColdFire subarch support files
into the existing coldfire directory. The sub-directories just ended
up duplicating Makefiles and now only contain really simple pieces of
code. This saves quite a few lines of code too.
As always a couple of bugs fixes thrown in too. Oh and a new
defconfig for the ColdFire platforms that support having the MMU
enabled."
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (39 commits)
m68k: add a defconfig for the M5475EVB ColdFire with MMU board
m68knommu: unaligned.h fix for M68000 core
m68k: merge the MMU and non-MMU versions of the arch dma code
m68knommu: reorganize the no-MMU cache flushing to match m68k
m68knommu: move the 54xx platform code into the common ColdFire code directory
m68knommu: move the 532x platform code into the common ColdFire code directory
m68knommu: move the 5407 platform code into the common ColdFire code directory
m68knommu: move the 5307 platform code into the common ColdFire code directory
m68knommu: move the 528x platform code into the common ColdFire code directory
m68knommu: move the 527x platform code into the common ColdFire code directory
m68knommu: move the 5272 platform code into the common ColdFire code directory
m68knommu: move the 5249 platform code into the common ColdFire code directory
m68knommu: move the 523x platform code into the common ColdFire code directory
m68knommu: move the 520x platform code into the common ColdFire code directory
m68knommu: move the 5206 platform code into the common ColdFire code directory
m68knommu: simplify the ColdFire 5407 GPIO struct setup
m68knommu: simplify the ColdFire 532x GPIO struct setup
m68knommu: simplify the ColdFire 5307 GPIO struct setup
m68knommu: simplify the ColdFire 528x GPIO struct setup
m68knommu: simplify the ColdFire 527x GPIO struct setup
...
Diffstat (limited to 'arch/m68k/platform/coldfire/intc-5249.c')
-rw-r--r-- | arch/m68k/platform/coldfire/intc-5249.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/m68k/platform/coldfire/intc-5249.c b/arch/m68k/platform/coldfire/intc-5249.c new file mode 100644 index 000000000000..f343bf7bf5b0 --- /dev/null +++ b/arch/m68k/platform/coldfire/intc-5249.c @@ -0,0 +1,61 @@ +/* + * intc2.c -- support for the 2nd INTC controller of the 5249 + * + * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com> + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/io.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> + +static void intc2_irq_gpio_mask(struct irq_data *d) +{ + u32 imr; + imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); + imr &= ~(0x1 << (d->irq - MCFINTC2_GPIOIRQ0)); + writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); +} + +static void intc2_irq_gpio_unmask(struct irq_data *d) +{ + u32 imr; + imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); + imr |= (0x1 << (d->irq - MCFINTC2_GPIOIRQ0)); + writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); +} + +static void intc2_irq_gpio_ack(struct irq_data *d) +{ + writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR); +} + +static struct irq_chip intc2_irq_gpio_chip = { + .name = "CF-INTC2", + .irq_mask = intc2_irq_gpio_mask, + .irq_unmask = intc2_irq_gpio_unmask, + .irq_ack = intc2_irq_gpio_ack, +}; + +static int __init mcf_intc2_init(void) +{ + int irq; + + /* GPIO interrupt sources */ + for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) { + irq_set_chip(irq, &intc2_irq_gpio_chip); + irq_set_handler(irq, handle_edge_irq); + } + + return 0; +} + +arch_initcall(mcf_intc2_init); |