diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-08 10:08:26 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-08 10:08:26 -0700 |
| commit | 53bcef60633086ad73683d01a4ef9ca678484d2d (patch) | |
| tree | 8b14cc031124d0aa0da6cd3b60115bc7eaa80061 /arch/cris/arch-v32/mach-a3/dram_init.S | |
| parent | 4fd6c6bf83cb16321e9902b00e2af79054f4e0d6 (diff) | |
| parent | 85d9865721c62a551547984e6cc8bd3ba732e294 (diff) | |
| download | talos-obmc-linux-53bcef60633086ad73683d01a4ef9ca678484d2d.tar.gz talos-obmc-linux-53bcef60633086ad73683d01a4ef9ca678484d2d.zip | |
Merge branch 'for-linus' of git://www.jni.nu/cris
* 'for-linus' of git://www.jni.nu/cris: (51 commits)
CRIS: Fix alignment problem for older ld
CRIS: Always dump registers for segfaulting process.
CRIS: Add config for pausing a seg-faulting process
CRIS: Don't take faults while in_atomic
CRIS: Fixup lookup for delay slot faults
CRIS: Discard exit.text and .data at runtime
CRIS: Add cache aligned and read mostly data sections
CRIS: Return something from profile write
CRIS: Add ARTPEC-3 and timestamps for sync-serial
CRIS: Better ARTPEC-3 support for gpio
CRIS: Add include guard
CRIS: Better handling of pinmux settings
CRIS: New DMA defines for ARTPEC-3
CRIS: __do_strncpy_from_user: Don't read the byte beyond the nil
CRIS: Pagetable for ARTPEC-3
CRIS: Machine dependent memmap.h
CRIS: Check if pointer is set before using it
CRIS: Machine dependent dma.h
CRIS: Define __read_mostly for CRISv32
CRIS: Discard .note.gnu.build-id section
...
Diffstat (limited to 'arch/cris/arch-v32/mach-a3/dram_init.S')
| -rw-r--r-- | arch/cris/arch-v32/mach-a3/dram_init.S | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/cris/arch-v32/mach-a3/dram_init.S b/arch/cris/arch-v32/mach-a3/dram_init.S index 94d6b41cb299..ec8648be32d3 100644 --- a/arch/cris/arch-v32/mach-a3/dram_init.S +++ b/arch/cris/arch-v32/mach-a3/dram_init.S @@ -24,11 +24,21 @@ ;; Refer to ddr2 MDS for initialization sequence + ; 2. Wait 200us + move.d 10000, $r2 +1: bne 1b + subq 1, $r2 + ; Start clock move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0 move.d REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1 move.d $r1, [$r0] + ; 2. Wait 200us + move.d 10000, $r2 +1: bne 1b + subq 1, $r2 + ; Reset phy and start calibration move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \ @@ -52,6 +62,10 @@ do_cmd: lslq 16, $r1 or.d $r3, $r1 move.d $r1, [$r0] + ; 2. Wait 200us + move.d 10000, $r4 +1: bne 1b + subq 1, $r4 cmp.d sdram_commands_end, $r2 blo command_loop nop @@ -63,7 +77,7 @@ do_cmd: ; Set latency move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency), $r0 - move.d 0x13, $r1 + move.d CONFIG_ETRAX_DDR2_LATENCY, $r1 move.d $r1, [$r0] ; Set configuration |
