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authorDmitry Osipenko <digetx@gmail.com>2017-10-20 01:08:03 +0300
committerThierry Reding <treding@nvidia.com>2017-12-21 17:03:49 +0100
commit55a042b3f68fc8c68adf4333ff74c4d3de796589 (patch)
tree7448a77c2b32958445b560bbf5cd53597826509a /arch/blackfin
parentc641ec6eab8587a78160d37f085a5ed6e542ca88 (diff)
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soc/tegra: fuse: Fix reading registers using DMA on Tegra20
FUSE driver doesn't configure DMA channel properly, because of it DMA transfer is never issued and tegra20_fuse_read() always return 0x0. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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