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| author | Arnd Bergmann <arnd@arndb.de> | 2016-09-02 18:12:09 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2016-09-02 18:12:09 +0200 |
| commit | c964cdc3694fb9b9975e1a5a098d208b1d49c885 (patch) | |
| tree | aa03a7ca74f10ab191223558203fec7fc871aeba /arch/arm | |
| parent | 3eab887a55424fc2c27553b7bfe32330df83f7b8 (diff) | |
| parent | 8f2c00629e43b0f32785c3e89b61cca89058929a (diff) | |
| download | talos-obmc-linux-c964cdc3694fb9b9975e1a5a098d208b1d49c885.tar.gz talos-obmc-linux-c964cdc3694fb9b9975e1a5a098d208b1d49c885.zip | |
Merge tag 'realview-broomstick-sweep' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/cleanup
Merge "delete the RealView boardfiles" from Linus Walleij:
This deletes the realview boardfiles, consolidates a bit
around the Kconfig options and leaves the mach-realview
directory nice and tidy, with all boards migrated over to
Device Tree.
* tag 'realview-broomstick-sweep' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: realview: imply device tree boot
ARM: realview: no need to select SMP_ON_UP explicitly
ARM: realview: delete the RealView board files
Diffstat (limited to 'arch/arm')
25 files changed, 15 insertions, 3786 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a9c4e48bb7ec..a6cdfefd7b9b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -278,10 +278,9 @@ config PHYS_OFFSET ARCH_INTEGRATOR || \ ARCH_IOP13XX || \ ARCH_KS8695 || \ - (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET) + ARCH_REALVIEW default 0x10000000 if ARCH_OMAP1 || ARCH_RPC default 0x20000000 if ARCH_S5PV210 - default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET default 0xc0000000 if ARCH_SA1100 help Please provide the physical address corresponding to the diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index 70ab4a25a5f8..1d7c83e73ffb 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -2,34 +2,29 @@ menuconfig ARCH_REALVIEW bool "ARM Ltd. RealView family" depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7 select ARM_AMBA + select ARM_GIC select ARM_TIMER_SP804 + select CLK_SP810 select COMMON_CLK_VERSATILE select GPIO_PL061 if GPIOLIB - select ICST - select PLAT_VERSATILE - select PLAT_VERSATILE_SCHED_CLOCK - help - This enables support for ARM Ltd RealView boards. - -if ARCH_REALVIEW - -config REALVIEW_DT - bool "Support RealView(R) Device Tree based boot" - select ARM_GIC - select CLK_SP810 - select HAVE_SMP + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP + select HAVE_PATA_PLATFORM + select HAVE_TCM select ICST select MACH_REALVIEW_EB if ARCH_MULTI_V5 select MFD_SYSCON + select PLAT_VERSATILE + select PLAT_VERSATILE_SCHED_CLOCK select POWER_RESET select POWER_RESET_VERSATILE select POWER_SUPPLY - select SMP_ON_UP if SMP select SOC_REALVIEW select USE_OF help - Include support for booting the ARM(R) RealView(R) evaluation - boards using a device tree machine description. + This enables support for ARM Ltd RealView boards. + +if ARCH_REALVIEW config MACH_REALVIEW_EB bool "Support RealView(R) Emulation Baseboard" @@ -60,8 +55,6 @@ config REALVIEW_EB_ARM1176 config REALVIEW_EB_A9MP bool "Support Multicore Cortex-A9 Tile" depends on MACH_REALVIEW_EB && ARCH_MULTI_V7 - select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 help @@ -71,30 +64,15 @@ config REALVIEW_EB_A9MP config REALVIEW_EB_ARM11MP bool "Support ARM11MPCore Tile" depends on MACH_REALVIEW_EB && ARCH_MULTI_V6 - select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 help Enable support for the ARM11MPCore tile fitted to the Realview(R) Emulation Baseboard platform. -config REALVIEW_EB_ARM11MP_REVB - bool "Support ARM11MPCore RevB Tile" - depends on REALVIEW_EB_ARM11MP && ARCH_MULTI_V6 - help - Enable support for the ARM11MPCore Revision B tile on the - Realview(R) Emulation Baseboard platform. Since there are device - address differences, a kernel built with this option enabled is - not compatible with other revisions of the ARM11MPCore tile. - config MACH_REALVIEW_PB11MP bool "Support RealView(R) Platform Baseboard for ARM11MPCore" depends on ARCH_MULTI_V6 - select ARM_GIC - select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP - select HAVE_PATA_PLATFORM select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 help @@ -106,7 +84,6 @@ config MACH_REALVIEW_PB11MP config MACH_REALVIEW_PB1176 bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S" depends on ARCH_MULTI_V6 - select ARM_GIC select CPU_V6 select HAVE_TCM select MIGHT_HAVE_CACHE_L2X0 @@ -114,20 +91,9 @@ config MACH_REALVIEW_PB1176 Include support for the ARM(R) RealView(R) Platform Baseboard for ARM1176JZF-S. -config REALVIEW_PB1176_SECURE_FLASH - bool "Allow access to the secure flash memory block" - depends on MACH_REALVIEW_PB1176 - default n - help - Select this option if Linux will only run in secure mode on the - RealView PB1176 platform and access to the secure flash memory - block (64MB @ 0x3c000000) is required. - config MACH_REALVIEW_PBA8 bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform" depends on ARCH_MULTI_V7 - select ARM_GIC - select HAVE_PATA_PLATFORM help Include support for the ARM(R) RealView Platform Baseboard for Cortex(tm)-A8. This platform has an on-board Cortex-A8 and has @@ -136,10 +102,6 @@ config MACH_REALVIEW_PBA8 config MACH_REALVIEW_PBX bool "Support RealView(R) Platform Baseboard Explore for Cortex-A9" depends on ARCH_MULTI_V7 - select ARM_GIC - select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP - select HAVE_PATA_PLATFORM select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select ZONE_DMA @@ -147,16 +109,4 @@ config MACH_REALVIEW_PBX Include support for the ARM(R) RealView(R) Platform Baseboard Explore. -config REALVIEW_HIGH_PHYS_OFFSET - bool "High physical base address for the RealView platform" - depends on MMU && !MACH_REALVIEW_PB1176 - default y - help - RealView boards other than PB1176 have the RAM available at - 0x70000000, 256MB of which being mirrored at 0x00000000. If - the board supports 512MB of RAM, this option allows the - memory to be accessed contiguously at the high physical - offset. On the PBX board, disabling this option allows 1GB of - RAM to be used with HIGHMEM. - endif diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile index 404882130956..adf39ad71cc3 100644 --- a/arch/arm/mach-realview/Makefile +++ b/arch/arm/mach-realview/Makefile @@ -3,16 +3,6 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-versatile/include -obj-y := core.o -obj-$(CONFIG_REALVIEW_DT) += realview-dt.o +obj-y += realview-dt.o obj-$(CONFIG_SMP) += platsmp-dt.o - -ifdef CONFIG_ATAGS -obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o -obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o -obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o -obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o -obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o -obj-$(CONFIG_SMP) += platsmp.o -endif obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-realview/board-eb.h b/arch/arm/mach-realview/board-eb.h deleted file mode 100644 index a850ae6945b0..000000000000 --- a/arch/arm/mach-realview/board-eb.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (C) 2007 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_BOARD_EB_H -#define __ASM_ARCH_BOARD_EB_H - -#include "platform.h" - -/* - * RealView EB + ARM11MPCore peripheral addresses - */ -#define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */ -#define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */ -#define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */ -#define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */ -#define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ -#define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */ -#define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ -#define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ -#define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */ -#define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */ -#define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */ -#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ -#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ -#define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */ - -#define REALVIEW_EB_FLASH_BASE 0x40000000 -#define REALVIEW_EB_FLASH_SIZE SZ_64M -#define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */ -#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */ - -#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB -#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x10100000 -#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ -#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ -#else -#define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000 -#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ -#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ -#endif - -#define REALVIEW_EB11MP_PRIV_MEM_SIZE SZ_8K -#define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x)) - -#define REALVIEW_EB11MP_SCU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0) /* SCU registers */ -#define REALVIEW_EB11MP_GIC_CPU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100) /* Generic interrupt controller CPU interface */ -#define REALVIEW_EB11MP_TWD_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600) -#define REALVIEW_EB11MP_GIC_DIST_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000) /* Generic interrupt controller distributor */ - -/* - * Core tile identification (REALVIEW_SYS_PROCID) - */ -#define REALVIEW_EB_PROC_MASK 0xFF000000 -#define REALVIEW_EB_PROC_ARM7TDMI 0x00000000 -#define REALVIEW_EB_PROC_ARM9 0x02000000 -#define REALVIEW_EB_PROC_ARM11 0x04000000 -#define REALVIEW_EB_PROC_ARM11MP 0x06000000 -#define REALVIEW_EB_PROC_A9MP 0x0C000000 - -#define check_eb_proc(proc_type) \ - ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ - == proc_type) - -#ifdef CONFIG_REALVIEW_EB_ARM11MP -#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP) -#else -#define core_tile_eb11mp() 0 -#endif - -#ifdef CONFIG_REALVIEW_EB_A9MP -#define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP) -#else -#define core_tile_a9mp() 0 -#endif - -#define machine_is_realview_eb_mp() \ - (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp())) - -#endif /* __ASM_ARCH_BOARD_EB_H */ diff --git a/arch/arm/mach-realview/board-pb1176.h b/arch/arm/mach-realview/board-pb1176.h deleted file mode 100644 index 29c04a9e1344..000000000000 --- a/arch/arm/mach-realview/board-pb1176.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_BOARD_PB1176_H -#define __ASM_ARCH_BOARD_PB1176_H - -#include "platform.h" - -/* - * Peripheral addresses - */ -#define REALVIEW_PB1176_UART4_BASE 0x10009000 /* UART 4 */ -#define REALVIEW_PB1176_SCTL_BASE 0x10100000 /* System controller */ -#define REALVIEW_PB1176_SMC_BASE 0x10111000 /* SMC */ -#define REALVIEW_PB1176_DMC_BASE 0x10109000 /* DMC configuration */ -#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ -#define REALVIEW_PB1176_FLASH_BASE 0x30000000 -#define REALVIEW_PB1176_FLASH_SIZE SZ_64M -#define REALVIEW_PB1176_SEC_FLASH_BASE 0x3C000000 /* Secure flash */ -#define REALVIEW_PB1176_SEC_FLASH_SIZE SZ_64M - -#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */ -#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */ -#define REALVIEW_PB1176_TIMER4_5_BASE 0x10106000 /* Timer 4 and 5 */ -#define REALVIEW_PB1176_WATCHDOG_BASE 0x10107000 /* watchdog interface */ -#define REALVIEW_PB1176_RTC_BASE 0x10108000 /* Real Time Clock */ -#define REALVIEW_PB1176_GPIO0_BASE 0x1010A000 /* GPIO port 0 */ -#define REALVIEW_PB1176_SSP_BASE 0x1010B000 /* Synchronous Serial Port */ -#define REALVIEW_PB1176_UART0_BASE 0x1010C000 /* UART 0 */ -#define REALVIEW_PB1176_UART1_BASE 0x1010D000 /* UART 1 */ -#define REALVIEW_PB1176_UART2_BASE 0x1010E000 /* UART 2 */ -#define REALVIEW_PB1176_UART3_BASE 0x1010F000 /* UART 3 */ -#define REALVIEW_PB1176_CLCD_BASE 0x10112000 /* CLCD */ -#define REALVIEW_PB1176_ETH_BASE 0x3A000000 /* Ethernet */ -#define REALVIEW_PB1176_USB_BASE 0x3B000000 /* USB */ - -/* - * PCI regions - */ -#define REALVIEW_PB1176_PCI_BASE 0x60000000 /* PCI self config */ -#define REALVIEW_PB1176_PCI_CFG_BASE 0x61000000 /* PCI config */ -#define REALVIEW_PB1176_PCI_IO_BASE0 0x62000000 /* PCI IO region */ -#define REALVIEW_PB1176_PCI_MEM_BASE0 0x63000000 /* Memory region 1 */ -#define REALVIEW_PB1176_PCI_MEM_BASE1 0x64000000 /* Memory region 2 */ -#define REALVIEW_PB1176_PCI_MEM_BASE2 0x68000000 /* Memory region 3 */ - -#define REALVIEW_PB1176_PCI_BASE_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_CFG_BASE_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_IO_BASE0_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE 0x04000000 /* 64MB */ -#define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE 0x08000000 /* 128MB */ - -#define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */ -#define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */ -#define REALVIEW_DC1176_ROM_BASE 0x10200000 /* 16KiB NRAM preudo-ROM, on devchip */ -#define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */ -#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ -#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ - -/* - * Control register SYS_RESETCTL Bit 8 is set to 1 to force a soft reset - */ -#define REALVIEW_PB1176_SYS_SOFT_RESET 0x0100 - -#endif /* __ASM_ARCH_BOARD_PB1176_H */ diff --git a/arch/arm/mach-realview/board-pb11mp.h b/arch/arm/mach-realview/board-pb11mp.h deleted file mode 100644 index b16e6e85e92d..000000000000 --- a/arch/arm/mach-realview/board-pb11mp.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_BOARD_PB11MP_H -#define __ASM_ARCH_BOARD_PB11MP_H - -#include "platform.h" - -/* - * Peripheral addresses - */ -#define REALVIEW_PB11MP_UART0_BASE 0x10009000 /* UART 0 */ -#define REALVIEW_PB11MP_UART1_BASE 0x1000A000 /* UART 1 */ -#define REALVIEW_PB11MP_UART2_BASE 0x1000B000 /* UART 2 */ -#define REALVIEW_PB11MP_UART3_BASE 0x1000C000 /* UART 3 */ -#define REALVIEW_PB11MP_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ -#define REALVIEW_PB11MP_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */ -#define REALVIEW_PB11MP_WATCHDOG_BASE 0x10010000 /* watchdog interface */ -#define REALVIEW_PB11MP_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ -#define REALVIEW_PB11MP_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ -#define REALVIEW_PB11MP_GPIO0_BASE 0x10013000 /* GPIO port 0 */ -#define REALVIEW_PB11MP_RTC_BASE 0x10017000 /* Real Time Clock */ -#define REALVIEW_PB11MP_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */ -#define REALVIEW_PB11MP_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */ -#define REALVIEW_PB11MP_SCTL_BASE 0x1001A000 /* System Controller */ -#define REALVIEW_PB11MP_CLCD_BASE 0x10020000 /* CLCD */ -#define REALVIEW_PB11MP_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */ -#define REALVIEW_PB11MP_DMC_BASE 0x100E0000 /* DMC configuration */ -#define REALVIEW_PB11MP_SMC_BASE 0x100E1000 /* SMC configuration */ -#define REALVIEW_PB11MP_CAN_BASE 0x100E2000 /* CAN bus */ -#define REALVIEW_PB11MP_CF_BASE 0x18000000 /* Compact flash */ -#define REALVIEW_PB11MP_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */ -#define REALVIEW_PB11MP_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ -#define REALVIEW_PB11MP_FLASH0_BASE 0x40000000 -#define REALVIEW_PB11MP_FLASH0_SIZE SZ_64M -#define REALVIEW_PB11MP_FLASH1_BASE 0x44000000 -#define REALVIEW_PB11MP_FLASH1_SIZE SZ_64M -#define REALVIEW_PB11MP_ETH_BASE 0x4E000000 /* Ethernet */ -#define REALVIEW_PB11MP_USB_BASE 0x4F000000 /* USB */ -#define REALVIEW_PB11MP_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */ -#define REALVIEW_PB11MP_LT_BASE 0xC0000000 /* Logic Tile expansion */ -#define REALVIEW_PB11MP_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */ -#define REALVIEW_PB11MP_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */ - -#define REALVIEW_PB11MP_SYS_PLD_CTRL1 0x74 - -/* - * PB11MPCore PCI regions - */ -#define REALVIEW_PB11MP_PCI_BASE 0x90040000 /* PCI-X Unit base */ -#define REALVIEW_PB11MP_PCI_IO_BASE 0x90050000 /* IO Region on AHB */ -#define REALVIEW_PB11MP_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */ - -#define REALVIEW_PB11MP_PCI_BASE_SIZE 0x10000 /* 16 Kb */ -#define REALVIEW_PB11MP_PCI_IO_SIZE 0x1000 /* 4 Kb */ -#define REALVIEW_PB11MP_PCI_MEM_SIZE 0x20000000 /* 512 MB */ - -/* - * Testchip peripheral and fpga gic regions - */ -#define REALVIEW_TC11MP_PRIV_MEM_BASE 0x1F000000 -#define REALVIEW_TC11MP_PRIV_MEM_SIZE SZ_8K -#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ -#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ -#define REALVIEW_TC11MP_TWD_BASE 0x1F000600 -#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ -#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ - - /* - * Values for REALVIEW_SYS_RESET_CTRL - */ -#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR 0x01 -#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT 0x02 -#define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET 0x03 -#define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET 0x04 -#define REALVIEW_PB11MP_SYS_CTRL_RESET_POR 0x05 -#define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC 0x06 - -#define REALVIEW_PB11MP_SYS_CTRL_LED (1 << 0) - -#endif /* __ASM_ARCH_BOARD_PB11MP_H */ diff --git a/arch/arm/mach-realview/board-pba8.h b/arch/arm/mach-realview/board-pba8.h deleted file mode 100644 index 6a1391f50373..000000000000 --- a/arch/arm/mach-realview/board-pba8.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_BOARD_PBA8_H -#define __ASM_ARCH_BOARD_PBA8_H - -#include "platform.h" - -/* - * Peripheral addresses - */ -#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */ -#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */ -#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */ -#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */ -#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ -#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */ -#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */ -#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ -#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ -#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */ -#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */ -#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */ -#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */ -#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */ -#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */ -#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */ -#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */ -#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */ -#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */ -#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ -#define REALVIEW_PBA8_FLASH0_BASE 0x40000000 -#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M -#define REALVIEW_PBA8_FLASH1_BASE 0x44000000 -#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M -#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */ -#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */ -#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */ -#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */ -#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */ -#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */ - -#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74 - -/* - * PBA8 PCI regions - */ -#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */ -#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */ -#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */ - -#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */ -#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */ -#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */ - -#endif /* __ASM_ARCH_BOARD_PBA8_H */ diff --git a/arch/arm/mach-realview/board-pbx.h b/arch/arm/mach-realview/board-pbx.h deleted file mode 100644 index 5cda480b12bb..000000000000 --- a/arch/arm/mach-realview/board-pbx.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Copyright (C) 2009 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_BOARD_PBX_H -#define __ASM_ARCH_BOARD_PBX_H - -#include "platform.h" - -/* - * Peripheral addresses - */ -#define REALVIEW_PBX_UART0_BASE 0x10009000 /* UART 0 */ -#define REALVIEW_PBX_UART1_BASE 0x1000A000 /* UART 1 */ -#define REALVIEW_PBX_UART2_BASE 0x1000B000 /* UART 2 */ -#define REALVIEW_PBX_UART3_BASE 0x1000C000 /* UART 3 */ -#define REALVIEW_PBX_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ -#define REALVIEW_PBX_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */ -#define REALVIEW_PBX_WATCHDOG_BASE 0x10010000 /* watchdog interface */ -#define REALVIEW_PBX_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ -#define REALVIEW_PBX_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ -#define REALVIEW_PBX_GPIO0_BASE 0x10013000 /* GPIO port 0 */ -#define REALVIEW_PBX_RTC_BASE 0x10017000 /* Real Time Clock */ -#define REALVIEW_PBX_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */ -#define REALVIEW_PBX_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */ -#define REALVIEW_PBX_SCTL_BASE 0x1001A000 /* System Controller */ -#define REALVIEW_PBX_CLCD_BASE 0x10020000 /* CLCD */ -#define REALVIEW_PBX_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */ -#define REALVIEW_PBX_DMC_BASE 0x100E0000 /* DMC configuration */ -#define REALVIEW_PBX_SMC_BASE 0x100E1000 /* SMC configuration */ -#define REALVIEW_PBX_CAN_BASE 0x100E2000 /* CAN bus */ -#define REALVIEW_PBX_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ -#define REALVIEW_PBX_FLASH0_BASE 0x40000000 -#define REALVIEW_PBX_FLASH0_SIZE SZ_64M -#define REALVIEW_PBX_FLASH1_BASE 0x44000000 -#define REALVIEW_PBX_FLASH1_SIZE SZ_64M -#define REALVIEW_PBX_ETH_BASE 0x4E000000 /* Ethernet */ -#define REALVIEW_PBX_USB_BASE 0x4F000000 /* USB */ -#define REALVIEW_PBX_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */ -#define REALVIEW_PBX_LT_BASE 0xC0000000 /* Logic Tile expansion */ -#define REALVIEW_PBX_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */ -#define REALVIEW_PBX_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */ - -/* - * Tile-specific addresses - */ -#define REALVIEW_PBX_TILE_SCU_BASE 0x1F000000 /* SCU registers */ -#define REALVIEW_PBX_TILE_GIC_CPU_BASE 0x1F000100 /* Private Generic interrupt controller CPU interface */ -#define REALVIEW_PBX_TILE_TWD_BASE 0x1F000600 -#define REALVIEW_PBX_TILE_TWD_PERCPU_BASE 0x1F000700 -#define REALVIEW_PBX_TILE_TWD_SIZE 0x00000100 -#define REALVIEW_PBX_TILE_GIC_DIST_BASE 0x1F001000 /* Private Generic interrupt controller distributor */ -#define REALVIEW_PBX_TILE_L220_BASE 0x1F002000 /* L220 registers */ - -#define REALVIEW_PBX_SYS_PLD_CTRL1 0x74 - -/* - * PBX PCI regions - */ -#define REALVIEW_PBX_PCI_BASE 0x90040000 /* PCI-X Unit base */ -#define REALVIEW_PBX_PCI_IO_BASE 0x90050000 /* IO Region on AHB */ -#define REALVIEW_PBX_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */ - -#define REALVIEW_PBX_PCI_BASE_SIZE 0x10000 /* 16 Kb */ -#define REALVIEW_PBX_PCI_IO_SIZE 0x1000 /* 4 Kb */ -#define REALVIEW_PBX_PCI_MEM_SIZE 0x20000000 /* 512 MB */ - -/* - * Core tile identification (REALVIEW_SYS_PROCID) - */ -#define REALVIEW_PBX_PROC_MASK 0xFF000000 -#define REALVIEW_PBX_PROC_ARM7TDMI 0x00000000 -#define REALVIEW_PBX_PROC_ARM9 0x02000000 -#define REALVIEW_PBX_PROC_ARM11 0x04000000 -#define REALVIEW_PBX_PROC_ARM11MP 0x06000000 -#define REALVIEW_PBX_PROC_A9MP 0x0C000000 -#define REALVIEW_PBX_PROC_A8 0x0E000000 - -#define check_pbx_proc(proc_type) \ - ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_PBX_PROC_MASK) \ - == proc_type) - -#ifdef CONFIG_MACH_REALVIEW_PBX -#define core_tile_pbx11mp() check_pbx_proc(REALVIEW_PBX_PROC_ARM11MP) -#define core_tile_pbxa9mp() check_pbx_proc(REALVIEW_PBX_PROC_A9MP) -#define core_tile_pbxa8() check_pbx_proc(REALVIEW_PBX_PROC_A8) -#else -#define core_tile_pbx11mp() 0 -#define core_tile_pbxa9mp() 0 -#define core_tile_pbxa8() 0 -#endif - -#endif /* __ASM_ARCH_BOARD_PBX_H */ diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c deleted file mode 100644 index baf174542e36..000000000000 --- a/arch/arm/mach-realview/core.c +++ /dev/null @@ -1,404 +0,0 @@ -/* - * linux/arch/arm/mach-realview/core.c - * - * Copyright (C) 1999 - 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/device.h> -#include <linux/interrupt.h> -#include <linux/amba/bus.h> -#include <linux/amba/clcd.h> -#include <linux/platform_data/video-clcd-versatile.h> -#include <linux/io.h> -#include <linux/smsc911x.h> -#include <linux/smc91x.h> -#include <linux/ata_platform.h> -#include <linux/amba/mmci.h> -#include <linux/gfp.h> -#include <linux/mtd/physmap.h> -#include <linux/memblock.h> - -#include <clocksource/timer-sp804.h> -#include "hardware.h" -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/hardware/icst.h> - -#include <asm/mach/arch.h> -#include <asm/mach/irq.h> -#include <asm/mach/map.h> - -#include "platform.h" - -#include <plat/sched_clock.h> - -#include "core.h" - -#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET) - -static void realview_flash_set_vpp(struct platform_device *pdev, int on) -{ - u32 val; - - val = __raw_readl(REALVIEW_FLASHCTRL); - if (on) - val |= REALVIEW_FLASHPROG_FLVPPEN; - else - val &= ~REALVIEW_FLASHPROG_FLVPPEN; - __raw_writel(val, REALVIEW_FLASHCTRL); -} - -static struct physmap_flash_data realview_flash_data = { - .width = 4, - .set_vpp = realview_flash_set_vpp, -}; - -struct platform_device realview_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &realview_flash_data, - }, -}; - -int realview_flash_register(struct resource *res, u32 num) -{ - realview_flash_device.resource = res; - realview_flash_device.num_resources = num; - return platform_device_register(&realview_flash_device); -} - -static struct smsc911x_platform_config smsc911x_config = { - .flags = SMSC911X_USE_32BIT, - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .phy_interface = PHY_INTERFACE_MODE_MII, -}; - -static struct smc91x_platdata smc91x_platdata = { - .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, -}; - -static struct platform_device realview_eth_device = { - .name = "smsc911x", - .id = 0, - .num_resources = 2, -}; - -int realview_eth_register(const char *name, struct resource *res) -{ - if (name) - realview_eth_device.name = name; - realview_eth_device.resource = res; - if (strcmp(realview_eth_device.name, "smsc911x") == 0) - realview_eth_device.dev.platform_data = &smsc911x_config; - else - realview_eth_device.dev.platform_data = &smc91x_platdata; - - return platform_device_register(&realview_eth_device); -} - -struct platform_device realview_usb_device = { - .name = "isp1760", - .num_resources = 2, -}; - -int realview_usb_register(struct resource *res) -{ - realview_usb_device.resource = res; - return platform_device_register(&realview_usb_device); -} - -static struct pata_platform_info pata_platform_data = { - .ioport_shift = 1, -}; - -static struct resource pata_resources[] = { - [0] = { - .start = REALVIEW_CF_BASE, - .end = REALVIEW_CF_BASE + 0xff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = REALVIEW_CF_BASE + 0x100, - .end = REALVIEW_CF_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device realview_cf_device = { - .name = "pata_platform", - .id = -1, - .num_resources = ARRAY_SIZE(pata_resources), - .resource = pata_resources, - .dev = { - .platform_data = &pata_platform_data, - }, -}; - -static struct resource realview_leds_resources[] = { - { - .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET, - .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device realview_leds_device = { - .name = "versatile-leds", - .id = -1, - .num_resources = ARRAY_SIZE(realview_leds_resources), - .resource = realview_leds_resources, -}; - -static struct resource realview_i2c_resource = { - .start = REALVIEW_I2C_BASE, - .end = REALVIEW_I2C_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, -}; - -struct platform_device realview_i2c_device = { - .name = "versatile-i2c", - .id = 0, - .num_resources = 1, - .resource = &realview_i2c_resource, -}; - -static struct i2c_board_info realview_i2c_board_info[] = { - { - I2C_BOARD_INFO("ds1338", 0xd0 >> 1), - }, -}; - -static int __init realview_i2c_init(void) -{ - return i2c_register_board_info(0, realview_i2c_board_info, - ARRAY_SIZE(realview_i2c_board_info)); -} -arch_initcall(realview_i2c_init); - -#define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET) - -/* - * This is only used if GPIOLIB support is disabled - */ -static unsigned int realview_mmc_status(struct device *dev) -{ - struct amba_device *adev = container_of(dev, struct amba_device, dev); - u32 mask; - - if (machine_is_realview_pb1176()) { - static bool inserted = false; - - /* - * The PB1176 does not have the status register, - * assume it is inserted at startup, then invert - * for each call so card insertion/removal will - * be detected anyway. This will not be called if - * GPIO on PL061 is active, which is the proper - * way to do this on the PB1176. - */ - inserted = !inserted; - return inserted ? 0 : 1; - } - - if (adev->res.start == REALVIEW_MMCI0_BASE) - mask = 1; - else - mask = 2; - - return readl(REALVIEW_SYSMCI) & mask; -} - -struct mmci_platform_data realview_mmc0_plat_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .status = realview_mmc_status, - .gpio_wp = 17, - .gpio_cd = 16, - .cd_invert = true, -}; - -struct mmci_platform_data realview_mmc1_plat_data = { - .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, - .status = realview_mmc_status, - .gpio_wp = 19, - .gpio_cd = 18, - .cd_invert = true, -}; - -void __init realview_init_early(void) -{ - void __iomem *sys = __io_address(REALVIEW_SYS_BASE); - - versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000); -} - -/* - * CLCD support. - */ -#define SYS_CLCD_NLCDIOON (1 << 2) -#define SYS_CLCD_VDDPOSSWITCH (1 << 3) -#define SYS_CLCD_PWR3V5SWITCH (1 << 4) -#define SYS_CLCD_ID_MASK (0x1f << 8) -#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) -#define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8) -#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) -#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) -#define SYS_CLCD_ID_VGA (0x1f << 8) - -/* - * Disable all display connectors on the interface module. - */ -static void realview_clcd_disable(struct clcd_fb *fb) -{ - void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; - u32 val; - - val = readl(sys_clcd); - val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; - writel(val, sys_clcd); -} - -/* - * Enable the relevant connector on the interface module. - */ -static void realview_clcd_enable(struct clcd_fb *fb) -{ - void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; - u32 val; - - /* - * Enable the PSUs - */ - val = readl(sys_clcd); - val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; - writel(val, sys_clcd); -} - -/* - * Detect which LCD panel is connected, and return the appropriate - * clcd_panel structure. Note: we do not have any information on - * the required timings for the 8.4in panel, so we presently assume - * VGA timings. - */ -static int realview_clcd_setup(struct clcd_fb *fb) -{ - void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; - const char *panel_name, *vga_panel_name; - unsigned long framesize; - u32 val; - - if (machine_is_realview_eb()) { - /* VGA, 16bpp */ - framesize = 640 * 480 * 2; - vga_panel_name = "VGA"; - } else { - /* XVGA, 16bpp */ - framesize = 1024 * 768 * 2; - vga_panel_name = "XVGA"; - } - - val = readl(sys_clcd) & SYS_CLCD_ID_MASK; - if (val == SYS_CLCD_ID_SANYO_3_8) - panel_name = "Sanyo TM38QV67A02A"; - else if (val == SYS_CLCD_ID_SANYO_2_5) - panel_name = "Sanyo QVGA Portrait"; - else if (val == SYS_CLCD_ID_EPSON_2_2) - panel_name = "Epson L2F50113T00"; - else if (val == SYS_CLCD_ID_VGA) - panel_name = vga_panel_name; - else { - pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val); - panel_name = vga_panel_name; - } - - fb->panel = versatile_clcd_get_panel(panel_name); - if (!fb->panel) - return -EINVAL; - - return versatile_clcd_setup_dma(fb, framesize); -} - -struct clcd_board clcd_plat_data = { - .name = "RealView", - .caps = CLCD_CAP_ALL, - .check = clcdfb_check, - .decode = clcdfb_decode, - .disable = realview_clcd_disable, - .enable = realview_clcd_enable, - .setup = realview_clcd_setup, - .mmap = versatile_clcd_mmap_dma, - .remove = versatile_clcd_remove_dma, -}; - -/* - * Where is the timer (VA)? - */ -void __iomem *timer0_va_base; -void __iomem *timer1_va_base; -void __iomem *timer2_va_base; -void __iomem *timer3_va_base; - -/* - * Set up the clock source and clock events devices - */ -void __init realview_timer_init(unsigned int timer_irq) -{ - u32 val; - - /* - * set clock frequency: - * REALVIEW_REFCLK is 32KHz - * REALVIEW_TIMCLK is 1MHz - */ - val = readl(__io_address(REALVIEW_SCTL_BASE)); - writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) | - (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) | - (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) | - (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val, - __io_address(REALVIEW_SCTL_BASE)); - - /* - * Initialise to a known state (all timers off) - */ - sp804_timer_disable(timer0_va_base); - sp804_timer_disable(timer1_va_base); - sp804_timer_disable(timer2_va_base); - sp804_timer_disable(timer3_va_base); - - sp804_clocksource_init(timer3_va_base, "timer3"); - sp804_clockevents_init(timer0_va_base, timer_irq, "timer0"); -} - -/* - * Setup the memory banks. - */ -void realview_fixup(struct tag *tags, char **from) -{ - /* - * Most RealView platforms have 512MB contiguous RAM at 0x70000000. - * Half of this is mirrored at 0. - */ -#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET - memblock_add(0x70000000, SZ_512M); -#else - memblock_add(0, SZ_256M); -#endif -} diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h deleted file mode 100644 index 05a995ea16d3..000000000000 --- a/arch/arm/mach-realview/core.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (C) 2004 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_REALVIEW_H -#define __ASM_ARCH_REALVIEW_H - -#include <linux/amba/bus.h> -#include <linux/io.h> - -#include <asm/setup.h> - -#define APB_DEVICE(name, busid, base, plat) \ -static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) - -#define AHB_DEVICE(name, busid, base, plat) \ -static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) - -struct machine_desc; - -extern struct platform_device realview_flash_device; -extern struct platform_device realview_cf_device; -extern struct platform_device realview_leds_device; -extern struct platform_device realview_i2c_device; -extern struct mmci_platform_data realview_mmc0_plat_data; -extern struct mmci_platform_data realview_mmc1_plat_data; -extern struct clcd_board clcd_plat_data; -extern void __iomem *timer0_va_base; -extern void __iomem *timer1_va_base; -extern void __iomem *timer2_va_base; -extern void __iomem *timer3_va_base; - -extern void realview_timer_init(unsigned int timer_irq); -extern int realview_flash_register(struct resource *res, u32 num); -extern int realview_eth_register(const char *name, struct resource *res); -extern int realview_usb_register(struct resource *res); -extern void realview_init_early(void); -extern void realview_fixup(struct tag *tags, char **from); - -extern const struct smp_operations realview_smp_ops; -extern void realview_cpu_die(unsigned int cpu); - -#endif diff --git a/arch/arm/mach-realview/hardware.h b/arch/arm/mach-realview/hardware.h deleted file mode 100644 index 957a230aadf4..000000000000 --- a/arch/arm/mach-realview/hardware.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file contains the hardware definitions of the RealView boards. - * - * Copyright (C) 2003 ARM Limited. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include <asm/sizes.h> - -/* macro to get at IO space when running virtually */ -#ifdef CONFIG_MMU -/* - * Statically mapped addresses: - * - * 10xx xxxx -> fbxx xxxx - * 1exx xxxx -> fdxx xxxx - * 1fxx xxxx -> fexx xxxx - */ -#define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000) -#else -#define IO_ADDRESS(x) (x) -#endif -#define __io_address(n) IOMEM(IO_ADDRESS(n)) - -#endif diff --git a/arch/arm/mach-realview/hotplug.h b/arch/arm/mach-realview/hotplug.h new file mode 100644 index 000000000000..eacd7a4dad2f --- /dev/null +++ b/arch/arm/mach-realview/hotplug.h @@ -0,0 +1 @@ +void realview_cpu_die(unsigned int cpu); diff --git a/arch/arm/mach-realview/irqs-eb.h b/arch/arm/mach-realview/irqs-eb.h deleted file mode 100644 index 61e31680a749..000000000000 --- a/arch/arm/mach-realview/irqs-eb.h +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright (C) 2007 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MACH_IRQS_EB_H -#define __MACH_IRQS_EB_H - -#define IRQ_LOCALTIMER 29 -#define IRQ_EB_GIC_START 32 - -/* - * RealView EB interrupt sources - */ -#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */ -#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */ -#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */ -#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */ -#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */ -#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */ -#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */ -#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */ -#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */ -#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */ -#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */ -#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */ -#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */ -#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */ -#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */ -#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */ - -/* - * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile) - */ -#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0) -#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1) -#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2) -#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3) -#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4) -#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5) -#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6) -#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7) -#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8) -#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9) -#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */ -#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */ -#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */ -#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */ -#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14) -#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15) - -#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17) -#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18) -#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19) -#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20) -#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21) -#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22) -#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23) -#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24) -#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25) -#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26) -#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27) -#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28) - -#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29) -#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30) -#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31) - -/* - * The 11MPcore tile leaves the following unconnected. - */ -#define IRQ_EB11MP_UART2 0 -#define IRQ_EB11MP_UART3 0 -#define IRQ_EB11MP_CLCD 0 -#define IRQ_EB11MP_DMA 0 -#define IRQ_EB11MP_WDOG 0 -#define IRQ_EB11MP_GPIO0 0 -#define IRQ_EB11MP_GPIO1 0 -#define IRQ_EB11MP_GPIO2 0 -#define IRQ_EB11MP_SCI 0 -#define IRQ_EB11MP_SSP 0 - -#define NR_GIC_EB11MP 2 - -#endif /* __MACH_IRQS_EB_H */ diff --git a/arch/arm/mach-realview/irqs-pb1176.h b/arch/arm/mach-realview/irqs-pb1176.h deleted file mode 100644 index 778edfd430e7..000000000000 --- a/arch/arm/mach-realview/irqs-pb1176.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MACH_IRQS_PB1176_H -#define __MACH_IRQS_PB1176_H - -#define IRQ_DC1176_GIC_START 32 -#define IRQ_PB1176_GIC_START 64 - -/* - * ARM1176 DevChip interrupt sources (primary GIC) - */ -#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */ -#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */ -#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_DC1176_CORE_PMU (IRQ_DC1176_GIC_START + 7) /* Core PMU interrupt */ -#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */ -#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */ -#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */ -#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11) -#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12) -#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) -#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) -#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ -#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) -#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ -#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ -#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ -#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */ -#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */ - -#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */ -#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */ - -/* - * RealView PB1176 interrupt sources (secondary GIC) - */ -#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */ -#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */ -#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */ -#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */ -#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5) -#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */ -#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */ -#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8) -#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9) -#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */ -#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */ - -#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16) - -#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */ - -#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22) -#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23) -#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ -#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ - -#define IRQ_PB1176_SCTL -1 - -#endif /* __MACH_IRQS_PB1176_H */ diff --git a/arch/arm/mach-realview/irqs-pb11mp.h b/arch/arm/mach-realview/irqs-pb11mp.h deleted file mode 100644 index 938898a3df9f..000000000000 --- a/arch/arm/mach-realview/irqs-pb11mp.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MACH_IRQS_PB11MP_H -#define __MACH_IRQS_PB11MP_H - -#define IRQ_LOCALTIMER 29 -#define IRQ_TC11MP_GIC_START 32 -#define IRQ_PB11MP_GIC_START 64 - -/* - * ARM11MPCore test chip interrupt sources (primary GIC on the test chip) - */ -#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0) -#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1) -#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2) -#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3) -#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4) -#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5) -#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6) -#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7) -#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8) -#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9) -#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */ -#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */ -#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */ -#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */ -#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14) -#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15) - -#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17) -#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18) -#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19) -#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20) -#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21) -#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22) -#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23) -#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24) -#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25) -#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26) -#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27) -#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28) - -#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29) -#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30) -#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31) - -/* - * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board) - */ -#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */ -#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */ -#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */ -#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */ -#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */ -#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */ -#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */ -#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */ -#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */ -#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */ -#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */ -#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */ -#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */ -#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */ - -#endif /* __MACH_IRQS_PB11MP_H */ diff --git a/arch/arm/mach-realview/irqs-pba8.h b/arch/arm/mach-realview/irqs-pba8.h deleted file mode 100644 index 262e321938b8..000000000000 --- a/arch/arm/mach-realview/irqs-pba8.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MACH_IRQS_PBA8_H -#define __MACH_IRQS_PBA8_H - -#define IRQ_PBA8_GIC_START 32 - -/* - * PB-A8 on-board gic irq sources - */ -#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */ -#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */ -#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */ -#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */ -#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */ -#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */ -#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */ -#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */ -#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */ -#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */ -#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */ -#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */ -#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */ -#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */ -#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */ -#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */ - -#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */ - -/* ... */ -#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50) -#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51) -#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52) -#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53) - -#define IRQ_PBA8_SMC -1 -#define IRQ_PBA8_SCTL -1 - -#endif /* __MACH_IRQS_PBA8_H */ diff --git a/arch/arm/mach-realview/irqs-pbx.h b/arch/arm/mach-realview/irqs-pbx.h deleted file mode 100644 index 4ef0567dec32..000000000000 --- a/arch/arm/mach-realview/irqs-pbx.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (C) 2009 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __MACH_IRQS_PBX_H -#define __MACH_IRQS_PBX_H - -#define IRQ_LOCALTIMER 29 -#define IRQ_PBX_GIC_START 32 - -/* - * PBX on-board gic irq sources - */ -#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */ -#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */ -#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */ -#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */ -#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */ -#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */ -#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */ -#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */ -#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */ -#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */ -#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */ -#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */ -#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */ -#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */ -#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */ -#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */ - -#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */ -#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33) -#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34) -#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35) -#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36) -#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37) -#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38) -#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39) - -#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */ -#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */ -#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */ -/* ... */ -#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */ -#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 45) -#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 46) -#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 47) - -/* ... */ -#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50) -#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51) -#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52) -#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53) - -#define IRQ_PBX_SMC -1 -#define IRQ_PBX_SCTL -1 - -#endif /* __MACH_IRQS_PBX_H */ diff --git a/arch/arm/mach-realview/platform.h b/arch/arm/mach-realview/platform.h deleted file mode 100644 index 11121739d371..000000000000 --- a/arch/arm/mach-realview/platform.h +++ /dev/null @@ -1,247 +0,0 @@ -/* - * Copyright (c) ARM Limited 2003. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_PLATFORM_H -#define __ASM_ARCH_PLATFORM_H - -/* - * Memory definitions - */ -#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/ -#define REALVIEW_BOOT_ROM_HI 0x30000000 -#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */ -#define REALVIEW_BOOT_ROM_SIZE SZ_64M - -#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */ -#define REALVIEW_SSRAM_SIZE SZ_2M - -/* - * SDRAM - */ -#define REALVIEW_SDRAM_BASE 0x00000000 - -/* - * Logic expansion modules - * - */ - - -/* ------------------------------------------------------------------------ - * RealView Registers - * ------------------------------------------------------------------------ - * - */ -#define REALVIEW_SYS_ID_OFFSET 0x00 -#define REALVIEW_SYS_SW_OFFSET 0x04 -#define REALVIEW_SYS_LED_OFFSET 0x08 -#define REALVIEW_SYS_OSC0_OFFSET 0x0C - -#define REALVIEW_SYS_OSC1_OFFSET 0x10 -#define REALVIEW_SYS_OSC2_OFFSET 0x14 -#define REALVIEW_SYS_OSC3_OFFSET 0x18 -#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */ - -#define REALVIEW_SYS_LOCK_OFFSET 0x20 -#define REALVIEW_SYS_100HZ_OFFSET 0x24 -#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28 -#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C -#define REALVIEW_SYS_FLAGS_OFFSET 0x30 -#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30 -#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34 -#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38 -#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38 -#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C -#define REALVIEW_SYS_RESETCTL_OFFSET 0x40 -#define REALVIEW_SYS_PCICTL_OFFSET 0x44 -#define REALVIEW_SYS_MCI_OFFSET 0x48 -#define REALVIEW_SYS_FLASH_OFFSET 0x4C -#define REALVIEW_SYS_CLCD_OFFSET 0x50 -#define REALVIEW_SYS_CLCDSER_OFFSET 0x54 -#define REALVIEW_SYS_BOOTCS_OFFSET 0x58 -#define REALVIEW_SYS_24MHz_OFFSET 0x5C -#define REALVIEW_SYS_MISC_OFFSET 0x60 -#define REALVIEW_SYS_IOSEL_OFFSET 0x70 -#define REALVIEW_SYS_PROCID_OFFSET 0x84 -#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0 -#define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4 -#define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8 -#define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC -#define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0 - -#define REALVIEW_SYS_BASE 0x10000000 -#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET) -#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET) -#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET) -#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET) -#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET) - -#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET) -#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET) -#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET) -#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET) -#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET) -#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET) -#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET) -#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET) -#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET) -#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET) -#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET) -#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET) -#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET) -#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET) -#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET) -#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET) -#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET) -#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET) -#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET) -#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET) -#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET) -#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET) -#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET) -#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET) -#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) -#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) - -/* ------------------------------------------------------------------------ - * RealView control registers - * ------------------------------------------------------------------------ - */ - -/* - * REALVIEW_IDFIELD - * - * 31:24 = manufacturer (0x41 = ARM) - * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus) - * 15:12 = FPGA (0x3 = XVC600 or XVC600E) - * 11:4 = build value - * 3:0 = revision number (0x1 = rev B (AHB)) - */ - -/* - * REALVIEW_SYS_LOCK - * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL, - * SYS_CLD, SYS_BOOTCS - */ -#define REALVIEW_SYS_LOCK_LOCKED (1 << 16) -#define REALVIEW_SYS_LOCK_VAL 0xA05F /* Enable write access */ - -/* - * REALVIEW_SYS_FLASH - */ -#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */ - -/* - * REALVIEW_INTREG - * - used to acknowledge and control MMCI and UART interrupts - */ -#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */ -#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */ -#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */ - /* write 1 to acknowledge and clear */ -#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */ -#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */ - -/* - * RealView common peripheral addresses - */ -#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */ -#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */ -#define REALVIEW_AACI_BASE 0x10004000 /* Audio */ -#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */ -#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */ -#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */ -#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */ -#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */ -#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */ -#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */ -#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */ -#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */ - -/* PCI space */ -#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */ -#define REALVIEW_PCI_CFG_BASE 0x42000000 -#define REALVIEW_PCI_MEM_BASE0 0x44000000 -#define REALVIEW_PCI_MEM_BASE1 0x50000000 -#define REALVIEW_PCI_MEM_BASE2 0x60000000 -/* Sizes of above maps */ -#define REALVIEW_PCI_BASE_SIZE 0x01000000 -#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000 -#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */ -#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */ -#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */ - -#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ -#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */ - -/* - * CompactFlash - */ -#define REALVIEW_CF_BASE 0x18000000 /* CompactFlash */ -#define REALVIEW_CF_MEM_BASE 0x18003000 /* SMC for CompactFlash */ - -/* - * Disk on Chip - */ -#define REALVIEW_DOC_BASE 0x2C000000 -#define REALVIEW_DOC_SIZE (16 << 20) -#define REALVIEW_DOC_PAGE_SIZE 512 -#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE) - -#define ERASE_UNIT_PAGES 32 -#define START_PAGE 0x80 - -/* - * LED settings, bits [7:0] - */ -#define REALVIEW_SYS_LED0 (1 << 0) -#define REALVIEW_SYS_LED1 (1 << 1) -#define REALVIEW_SYS_LED2 (1 << 2) -#define REALVIEW_SYS_LED3 (1 << 3) -#define REALVIEW_SYS_LED4 (1 << 4) -#define REALVIEW_SYS_LED5 (1 << 5) -#define REALVIEW_SYS_LED6 (1 << 6) -#define REALVIEW_SYS_LED7 (1 << 7) - -#define ALL_LEDS 0xFF - -#define LED_BANK REALVIEW_SYS_LED - -/* - * Control registers - */ -#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */ -#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */ -#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */ -#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ - -/* - * System controller bit assignment - */ -#define REALVIEW_REFCLK 0 -#define REALVIEW_TIMCLK 1 - -#define REALVIEW_TIMER1_EnSel 15 -#define REALVIEW_TIMER2_EnSel 17 -#define REALVIEW_TIMER3_EnSel 19 -#define REALVIEW_TIMER4_EnSel 21 - - -#define REALVIEW_CSR_BASE 0x10000000 -#define REALVIEW_CSR_SIZE 0x10000000 - -#endif /* __ASM_ARCH_PLATFORM_H */ diff --git a/arch/arm/mach-realview/platsmp-dt.c b/arch/arm/mach-realview/platsmp-dt.c index 6964e8876061..70ca99eb52c6 100644 --- a/arch/arm/mach-realview/platsmp-dt.c +++ b/arch/arm/mach-realview/platsmp-dt.c @@ -17,8 +17,7 @@ #include <asm/smp_scu.h> #include <plat/platsmp.h> - -#include "core.h" +#include "hotplug.h" #define REALVIEW_SYS_FLAGSSET_OFFSET 0x30 diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c deleted file mode 100644 index e8ab69c7abfb..000000000000 --- a/arch/arm/mach-realview/platsmp.c +++ /dev/null @@ -1,86 +0,0 @@ -/* - * linux/arch/arm/mach-realview/platsmp.c - * - * Copyright (C) 2002 ARM Ltd. - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/init.h> -#include <linux/errno.h> -#include <linux/smp.h> -#include <linux/io.h> - -#include "hardware.h" -#include <asm/mach-types.h> -#include <asm/smp_scu.h> - -#include "board-eb.h" -#include "board-pb11mp.h" -#include "board-pbx.h" - -#include <plat/platsmp.h> - -#include "core.h" - -static void __iomem *scu_base_addr(void) -{ - if (machine_is_realview_eb_mp()) - return __io_address(REALVIEW_EB11MP_SCU_BASE); - else if (machine_is_realview_pb11mp()) - return __io_address(REALVIEW_TC11MP_SCU_BASE); - else if (machine_is_realview_pbx() && - (core_tile_pbx11mp() || core_tile_pbxa9mp())) - return __io_address(REALVIEW_PBX_TILE_SCU_BASE); - else - return (void __iomem *)0; -} - -/* - * Initialise the CPU possible map early - this describes the CPUs - * which may be present or become present in the system. - */ -static void __init realview_smp_init_cpus(void) -{ - void __iomem *scu_base = scu_base_addr(); - unsigned int i, ncores; - - ncores = scu_base ? scu_get_core_count(scu_base) : 1; - - /* sanity check */ - if (ncores > nr_cpu_ids) { - pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", - ncores, nr_cpu_ids); - ncores = nr_cpu_ids; - } - - for (i = 0; i < ncores; i++) - set_cpu_possible(i, true); -} - -static void __init realview_smp_prepare_cpus(unsigned int max_cpus) -{ - - scu_enable(scu_base_addr()); - - /* - * Write the address of secondary startup into the - * system-wide flags register. The BootMonitor waits - * until it receives a soft interrupt, and then the - * secondary CPU branches to this address. - */ - __raw_writel(virt_to_phys(versatile_secondary_startup), - __io_address(REALVIEW_SYS_FLAGSSET)); -} - -const struct smp_operations realview_smp_ops __initconst = { - .smp_init_cpus = realview_smp_init_cpus, - .smp_prepare_cpus = realview_smp_prepare_cpus, - .smp_secondary_init = versatile_secondary_init, - .smp_boot_secondary = versatile_boot_secondary, -#ifdef CONFIG_HOTPLUG_CPU - .cpu_die = realview_cpu_die, -#endif -}; diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c deleted file mode 100644 index b442fa61e943..000000000000 --- a/arch/arm/mach-realview/realview_eb.c +++ /dev/null @@ -1,492 +0,0 @@ -/* - * linux/arch/arm/mach-realview/realview_eb.c - * - * Copyright (C) 2004 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl061.h> -#include <linux/amba/mmci.h> -#include <linux/amba/pl022.h> -#include <linux/io.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/platform_data/clk-realview.h> -#include <linux/reboot.h> - -#include "hardware.h" -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/pgtable.h> -#include <asm/hardware/cache-l2x0.h> -#include <asm/smp_twd.h> -#include <asm/system_info.h> -#include <asm/outercache.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> - -#include "board-eb.h" -#include "irqs-eb.h" - -#include "core.h" - -static struct map_desc realview_eb_io_desc[] __initdata = { - { - .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), - .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), - .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -#ifdef CONFIG_DEBUG_LL - { - .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - } -#endif -}; - -static struct map_desc realview_eb11mp_io_desc[] __initdata = { - { - .virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE), - .length = REALVIEW_EB11MP_PRIV_MEM_SIZE, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE), - .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE), - .length = SZ_8K, - .type = MT_DEVICE, - } -}; - -static void __init realview_eb_map_io(void) -{ - iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); - if (core_tile_eb11mp() || core_tile_a9mp()) - iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); -} - -static struct pl061_platform_data gpio0_plat_data = { - .gpio_base = 0, -}; - -static struct pl061_platform_data gpio1_plat_data = { - .gpio_base = 8, -}; - -static struct pl061_platform_data gpio2_plat_data = { - .gpio_base = 16, -}; - -static struct pl022_ssp_controller ssp0_plat_data = { - .bus_id = 0, - .enable_dma = 0, - .num_chipselect = 1, -}; - -/* - * RealView EB AMBA devices - */ - -/* - * These devices are connected via the core APB bridge - */ -#define GPIO2_IRQ { IRQ_EB_GPIO2 } -#define GPIO3_IRQ { IRQ_EB_GPIO3 } - -#define AACI_IRQ { IRQ_EB_AACI } -#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } -#define KMI0_IRQ { IRQ_EB_KMI0 } -#define KMI1_IRQ { IRQ_EB_KMI1 } - -/* - * These devices are connected directly to the multi-layer AHB switch - */ -#define EB_SMC_IRQ { } -#define MPMC_IRQ { } -#define EB_CLCD_IRQ { IRQ_EB_CLCD } -#define DMAC_IRQ { IRQ_EB_DMA } - -/* - * These devices are connected via the core APB bridge - */ -#define SCTL_IRQ { } -#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } -#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } -#define GPIO1_IRQ { IRQ_EB_GPIO1 } -#define EB_RTC_IRQ { IRQ_EB_RTC } - -/* - * These devices are connected via the DMA APB bridge - */ -#define SCI_IRQ { IRQ_EB_SCI } -#define EB_UART0_IRQ { IRQ_EB_UART0 } -#define EB_UART1_IRQ { IRQ_EB_UART1 } -#define EB_UART2_IRQ { IRQ_EB_UART2 } -#define EB_UART3_IRQ { IRQ_EB_UART3 } -#define EB_SSP_IRQ { IRQ_EB_SSP } - -/* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); - -/* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); -AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); - -static struct amba_device *amba_devs[] __initdata = { - &dmac_device, - &uart0_device, - &uart1_device, - &uart2_device, - &uart3_device, - &smc_device, - &clcd_device, - &sctl_device, - &wdog_device, - &gpio0_device, - &gpio1_device, - &gpio2_device, - &rtc_device, - &sci0_device, - &ssp0_device, - &aaci_device, - &mmc0_device, - &kmi0_device, - &kmi1_device, -}; - -/* - * RealView EB platform devices - */ -static struct resource realview_eb_flash_resource = { - .start = REALVIEW_EB_FLASH_BASE, - .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, -}; - -static struct resource realview_eb_eth_resources[] = { - [0] = { - .start = REALVIEW_EB_ETH_BASE, - .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_EB_ETH, - .end = IRQ_EB_ETH, - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, - }, -}; - -/* - * Detect and register the correct Ethernet device. RealView/EB rev D - * platforms use the newer SMSC LAN9118 Ethernet chip - */ -static int eth_device_register(void) -{ - void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); - const char *name = NULL; - u32 idrev; - - if (!eth_addr) - return -ENOMEM; - - idrev = readl(eth_addr + 0x50); - if ((idrev & 0xFFFF0000) != 0x01180000) - /* SMSC LAN9118 not present, use LAN91C111 instead */ - name = "smc91x"; - - iounmap(eth_addr); - return realview_eth_register(name, realview_eb_eth_resources); -} - -static struct resource realview_eb_isp1761_resources[] = { - [0] = { - .start = REALVIEW_EB_USB_BASE, - .end = REALVIEW_EB_USB_BASE + SZ_128K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_EB_USB, - .end = IRQ_EB_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource pmu_resources[] = { - [0] = { - .start = IRQ_EB11MP_PMU_CPU0, - .end = IRQ_EB11MP_PMU_CPU0, - .flags = IORESOURCE_IRQ, - }, - [1] = { - .start = IRQ_EB11MP_PMU_CPU1, - .end = IRQ_EB11MP_PMU_CPU1, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_EB11MP_PMU_CPU2, - .end = IRQ_EB11MP_PMU_CPU2, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_EB11MP_PMU_CPU3, - .end = IRQ_EB11MP_PMU_CPU3, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device pmu_device = { - .id = -1, - .num_resources = ARRAY_SIZE(pmu_resources), - .resource = pmu_resources, -}; - -static struct resource char_lcd_resources[] = { - { - .start = REALVIEW_CHAR_LCD_BASE, - .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1), - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_EB_CHARLCD, - .end = IRQ_EB_CHARLCD, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device char_lcd_device = { - .name = "arm-charlcd", - .id = -1, - .num_resources = ARRAY_SIZE(char_lcd_resources), - .resource = char_lcd_resources, -}; - -static void __init gic_init_irq(void) -{ - if (core_tile_eb11mp() || core_tile_a9mp()) { - unsigned int pldctrl; - - /* new irq mode */ - writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); - pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); - pldctrl |= 0x00800000; - writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); - writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); - - /* core tile GIC, primary */ - gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), - __io_address(REALVIEW_EB11MP_GIC_CPU_BASE)); - -#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB - /* board GIC, secondary */ - gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE), - __io_address(REALVIEW_EB_GIC_CPU_BASE)); - gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); -#endif - } else { - /* board GIC, primary */ - gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), - __io_address(REALVIEW_EB_GIC_CPU_BASE)); - } -} - -/* - * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile - */ -static void realview_eb11mp_fixup(void) -{ - /* AMBA devices */ - dmac_device.irq[0] = IRQ_EB11MP_DMA; - uart0_device.irq[0] = IRQ_EB11MP_UART0; - uart1_device.irq[0] = IRQ_EB11MP_UART1; - uart2_device.irq[0] = IRQ_EB11MP_UART2; - uart3_device.irq[0] = IRQ_EB11MP_UART3; - clcd_device.irq[0] = IRQ_EB11MP_CLCD; - wdog_device.irq[0] = IRQ_EB11MP_WDOG; - gpio0_device.irq[0] = IRQ_EB11MP_GPIO0; - gpio1_device.irq[0] = IRQ_EB11MP_GPIO1; - gpio2_device.irq[0] = IRQ_EB11MP_GPIO2; - rtc_device.irq[0] = IRQ_EB11MP_RTC; - sci0_device.irq[0] = IRQ_EB11MP_SCI; - ssp0_device.irq[0] = IRQ_EB11MP_SSP; - aaci_device.irq[0] = IRQ_EB11MP_AACI; - mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A; - mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B; - kmi0_device.irq[0] = IRQ_EB11MP_KMI0; - kmi1_device.irq[0] = IRQ_EB11MP_KMI1; - - /* platform devices */ - realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH; - realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH; - realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB; - realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB; -} - -#ifdef CONFIG_HAVE_ARM_TWD -static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, - REALVIEW_EB11MP_TWD_BASE, - IRQ_LOCALTIMER); - -static void __init realview_eb_twd_init(void) -{ - if (core_tile_eb11mp() || core_tile_a9mp()) { - int err = twd_local_timer_register(&twd_local_timer); - if (err) - pr_err("twd_local_timer_register failed %d\n", err); - } -} -#else -#define realview_eb_twd_init() do { } while(0) -#endif - -static void __init realview_eb_timer_init(void) -{ - unsigned int timer_irq; - - timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE); - timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20; - timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); - timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; - - if (core_tile_eb11mp() || core_tile_a9mp()) - timer_irq = IRQ_EB11MP_TIMER0_1; - else - timer_irq = IRQ_EB_TIMER0_1; - - realview_clk_init(__io_address(REALVIEW_SYS_BASE), false); - realview_timer_init(timer_irq); - realview_eb_twd_init(); -} - -static void realview_eb_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); - void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); - - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); - if (core_tile_eb11mp()) - __raw_writel(0x0008, reset_ctrl); - dsb(); -} - -static void __init realview_eb_init(void) -{ - int i; - - if (core_tile_eb11mp() || core_tile_a9mp()) { - realview_eb11mp_fixup(); - -#ifdef CONFIG_CACHE_L2X0 - /* - * The PL220 needs to be manually configured as the hardware - * doesn't report the correct sizes. - * 1MB (128KB/way), 8-way associativity, event monitor and - * parity enabled, ignore share bit, no force write allocate - * Bits: .... ...0 0111 1001 0000 .... .... .... - */ - l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff); - - /* - * due to a bug in the l220 cache controller, we must not call - * the sync function. stub it out here instead! - */ - outer_cache.sync = NULL; -#endif - pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu"; - platform_device_register(&pmu_device); - } - - realview_flash_register(&realview_eb_flash_resource, 1); - platform_device_register(&realview_i2c_device); - platform_device_register(&char_lcd_device); - platform_device_register(&realview_leds_device); - eth_device_register(); - realview_usb_register(realview_eb_isp1761_resources); - - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - amba_device_register(d, &iomem_resource); - } -} - -MACHINE_START(REALVIEW_EB, "ARM-RealView EB") - /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .atag_offset = 0x100, - .smp = smp_ops(realview_smp_ops), - .fixup = realview_fixup, - .map_io = realview_eb_map_io, - .init_early = realview_init_early, - .init_irq = gic_init_irq, - .init_time = realview_eb_timer_init, - .init_machine = realview_eb_init, -#ifdef CONFIG_ZONE_DMA - .dma_zone_size = SZ_256M, -#endif - .restart = realview_eb_restart, -MACHINE_END diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c deleted file mode 100644 index 537f3878d501..000000000000 --- a/arch/arm/mach-realview/realview_pb1176.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * linux/arch/arm/mach-realview/realview_pb1176.c - * - * Copyright (C) 2008 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl061.h> -#include <linux/amba/mmci.h> -#include <linux/amba/pl022.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/partitions.h> -#include <linux/io.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/platform_data/clk-realview.h> -#include <linux/reboot.h> -#include <linux/memblock.h> - -#include "hardware.h" -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/pgtable.h> -#include <asm/hardware/cache-l2x0.h> - -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> - -#include "board-pb1176.h" -#include "irqs-pb1176.h" - -#include "core.h" - -static struct map_desc realview_pb1176_io_desc[] __initdata = { - { - .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), - .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE), - .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), - .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE), - .length = SZ_8K, - .type = MT_DEVICE, - }, -#ifdef CONFIG_DEBUG_LL - { - .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -#endif -}; - -static void __init realview_pb1176_map_io(void) -{ - iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc)); -} - -static struct pl061_platform_data gpio0_plat_data = { - .gpio_base = 0, -}; - -static struct pl061_platform_data gpio1_plat_data = { - .gpio_base = 8, -}; - -static struct pl061_platform_data gpio2_plat_data = { - .gpio_base = 16, -}; - -static struct pl022_ssp_controller ssp0_plat_data = { - .bus_id = 0, - .enable_dma = 0, - .num_chipselect = 1, -}; - -/* - * RealView PB1176 AMBA devices - */ -#define GPIO2_IRQ { IRQ_PB1176_GPIO2 } -#define GPIO3_IRQ { IRQ_PB1176_GPIO3 } -#define AACI_IRQ { IRQ_PB1176_AACI } -#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } -#define KMI0_IRQ { IRQ_PB1176_KMI0 } -#define KMI1_IRQ { IRQ_PB1176_KMI1 } -#define PB1176_SMC_IRQ { } -#define MPMC_IRQ { } -#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } -#define SCTL_IRQ { } -#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } -#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } -#define GPIO1_IRQ { IRQ_PB1176_GPIO1 } -#define PB1176_RTC_IRQ { IRQ_DC1176_RTC } -#define SCI_IRQ { IRQ_PB1176_SCI } -#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } -#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } -#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } -#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } -#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } -#define PB1176_SSP_IRQ { IRQ_DC1176_SSP } - -/* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); - -/* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); -APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); -AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); - -static struct amba_device *amba_devs[] __initdata = { - &uart0_device, - &uart1_device, - &uart2_device, - &uart3_device, - &uart4_device, - &smc_device, - &clcd_device, - &sctl_device, - &wdog_device, - &gpio0_device, - &gpio1_device, - &gpio2_device, - &rtc_device, - &sci0_device, - &ssp0_device, - &aaci_device, - &mmc0_device, - &kmi0_device, - &kmi1_device, -}; - -/* - * RealView PB1176 platform devices - */ -static struct resource realview_pb1176_flash_resources[] = { - { - .start = REALVIEW_PB1176_FLASH_BASE, - .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH - { - .start = REALVIEW_PB1176_SEC_FLASH_BASE, - .end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -#endif -}; - -static struct physmap_flash_data pb1176_rom_pdata = { - .probe_type = "map_rom", - .width = 4, - .nr_parts = 0, -}; - -static struct resource pb1176_rom_resources[] = { - /* - * This exposes the PB1176 DevChip ROM as an MTD ROM mapping. - * The reference manual states that this is actually a pseudo-ROM - * programmed in NVRAM. - */ - { - .start = REALVIEW_DC1176_ROM_BASE, - .end = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device pb1176_rom_device = { - .name = "physmap-flash", - .id = -1, - .num_resources = ARRAY_SIZE(pb1176_rom_resources), - .resource = pb1176_rom_resources, - .dev = { - .platform_data = &pb1176_rom_pdata, - }, -}; - -static struct resource realview_pb1176_smsc911x_resources[] = { - [0] = { - .start = REALVIEW_PB1176_ETH_BASE, - .end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PB1176_ETH, - .end = IRQ_PB1176_ETH, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource realview_pb1176_isp1761_resources[] = { - [0] = { - .start = REALVIEW_PB1176_USB_BASE, - .end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PB1176_USB, - .end = IRQ_PB1176_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource pmu_resource = { - .start = IRQ_DC1176_CORE_PMU, - .end = IRQ_DC1176_CORE_PMU, - .flags = IORESOURCE_IRQ, -}; - -static struct platform_device pmu_device = { - .name = "armv6-pmu", - .id = -1, - .num_resources = 1, - .resource = &pmu_resource, -}; - -static struct resource char_lcd_resources[] = { - { - .start = REALVIEW_CHAR_LCD_BASE, - .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1), - .flags = IORESOURCE_MEM, - }, - { - .start = IRQ_PB1176_CHARLCD, - .end = IRQ_PB1176_CHARLCD, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device char_lcd_device = { - .name = "arm-charlcd", - .id = -1, - .num_resources = ARRAY_SIZE(char_lcd_resources), - .resource = char_lcd_resources, -}; - -static void __init gic_init_irq(void) -{ - /* ARM1176 DevChip GIC, primary */ - gic_init(0, IRQ_DC1176_GIC_START, - __io_address(REALVIEW_DC1176_GIC_DIST_BASE), - __io_address(REALVIEW_DC1176_GIC_CPU_BASE)); - - /* board GIC, secondary */ - gic_init(1, IRQ_PB1176_GIC_START, - __io_address(REALVIEW_PB1176_GIC_DIST_BASE), - __io_address(REALVIEW_PB1176_GIC_CPU_BASE)); - gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1); -} - -static void __init realview_pb1176_timer_init(void) -{ - timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE); - timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20; - timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE); - timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20; - - realview_clk_init(__io_address(REALVIEW_SYS_BASE), true); - realview_timer_init(IRQ_DC1176_TIMER0); -} - -static void realview_pb1176_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); - void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); - __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); - __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl); - dsb(); -} - -static void realview_pb1176_fixup(struct tag *tags, char **from) -{ - /* - * RealView PB1176 only has 128MB of RAM mapped at 0. - */ - memblock_add(0, SZ_128M); -} - -static void __init realview_pb1176_init(void) -{ - int i; - -#ifdef CONFIG_CACHE_L2X0 - /* - * The PL220 needs to be manually configured as the hardware - * doesn't report the correct sizes. - * 128kB (16kB/way), 8-way associativity, event monitor and - * parity enabled, ignore share bit, no force write allocate - * Bits: .... ...0 0111 0011 0000 .... .... .... - */ - l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff); -#endif - - realview_flash_register(realview_pb1176_flash_resources, - ARRAY_SIZE(realview_pb1176_flash_resources)); - platform_device_register(&pb1176_rom_device); - realview_eth_register(NULL, realview_pb1176_smsc911x_resources); - platform_device_register(&realview_i2c_device); - realview_usb_register(realview_pb1176_isp1761_resources); - platform_device_register(&pmu_device); - platform_device_register(&char_lcd_device); - platform_device_register(&realview_leds_device); - - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - amba_device_register(d, &iomem_resource); - } -} - -MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") - /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .atag_offset = 0x100, - .fixup = realview_pb1176_fixup, - .map_io = realview_pb1176_map_io, - .init_early = realview_init_early, - .init_irq = gic_init_irq, - .init_time = realview_pb1176_timer_init, - .init_machine = realview_pb1176_init, -#ifdef CONFIG_ZONE_DMA - .dma_zone_size = SZ_256M, -#endif - .restart = realview_pb1176_restart, -MACHINE_END diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c deleted file mode 100644 index a90a0752f157..000000000000 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ /dev/null @@ -1,385 +0,0 @@ -/* - * linux/arch/arm/mach-realview/realview_pb11mp.c - * - * Copyright (C) 2008 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl061.h> -#include <linux/amba/mmci.h> -#include <linux/amba/pl022.h> -#include <linux/io.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/platform_data/clk-realview.h> -#include <linux/reboot.h> - -#include "hardware.h" -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/pgtable.h> -#include <asm/hardware/cache-l2x0.h> -#include <asm/smp_twd.h> - -#include <asm/mach/arch.h> -#include <asm/mach/flash.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> -#include <asm/outercache.h> - -#include "board-pb11mp.h" -#include "irqs-pb11mp.h" - -#include "core.h" - -static struct map_desc realview_pb11mp_io_desc[] __initdata = { - { - .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), - .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { /* Maps the SCU, GIC CPU interface, TWD, GIC DIST */ - .virtual = IO_ADDRESS(REALVIEW_TC11MP_PRIV_MEM_BASE), - .pfn = __phys_to_pfn(REALVIEW_TC11MP_PRIV_MEM_BASE), - .length = REALVIEW_TC11MP_PRIV_MEM_SIZE, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), - .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE), - .pfn = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE), - .length = SZ_8K, - .type = MT_DEVICE, - }, -#ifdef CONFIG_DEBUG_LL - { - .virtual = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE), - .pfn = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -#endif -}; - -static void __init realview_pb11mp_map_io(void) -{ - iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc)); -} - -static struct pl061_platform_data gpio0_plat_data = { - .gpio_base = 0, -}; - -static struct pl061_platform_data gpio1_plat_data = { - .gpio_base = 8, -}; - -static struct pl061_platform_data gpio2_plat_data = { - .gpio_base = 16, -}; - -static struct pl022_ssp_controller ssp0_plat_data = { - .bus_id = 0, - .enable_dma = 0, - .num_chipselect = 1, -}; - -/* - * RealView PB11MPCore AMBA devices - */ - -#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } -#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } -#define AACI_IRQ { IRQ_TC11MP_AACI } -#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } -#define KMI0_IRQ { IRQ_TC11MP_KMI0 } -#define KMI1_IRQ { IRQ_TC11MP_KMI1 } -#define PB11MP_SMC_IRQ { } -#define MPMC_IRQ { } -#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } -#define DMAC_IRQ { IRQ_PB11MP_DMAC } -#define SCTL_IRQ { } -#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } -#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } -#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } -#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } -#define SCI_IRQ { IRQ_PB11MP_SCI } -#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } -#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } -#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } -#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } -#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } - -/* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); - -/* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); - -/* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); - -static struct amba_device *amba_devs[] __initdata = { - &dmac_device, - &uart0_device, - &uart1_device, - &uart2_device, - &uart3_device, - &smc_device, - &clcd_device, - &sctl_device, - &wdog_device, - &gpio0_device, - &gpio1_device, - &gpio2_device, - &rtc_device, - &sci0_device, - &ssp0_device, - &aaci_device, - &mmc0_device, - &kmi0_device, - &kmi1_device, -}; - -/* - * RealView PB11MPCore platform devices - */ -static struct resource realview_pb11mp_flash_resource[] = { - [0] = { - .start = REALVIEW_PB11MP_FLASH0_BASE, - .end = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = REALVIEW_PB11MP_FLASH1_BASE, - .end = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource realview_pb11mp_smsc911x_resources[] = { - [0] = { - .start = REALVIEW_PB11MP_ETH_BASE, - .end = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_TC11MP_ETH, - .end = IRQ_TC11MP_ETH, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource realview_pb11mp_isp1761_resources[] = { - [0] = { - .start = REALVIEW_PB11MP_USB_BASE, - .end = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_TC11MP_USB, - .end = IRQ_TC11MP_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource pmu_resources[] = { - [0] = { - .start = IRQ_TC11MP_PMU_CPU0, - .end = IRQ_TC11MP_PMU_CPU0, - .flags = IORESOURCE_IRQ, - }, - [1] = { - .start = IRQ_TC11MP_PMU_CPU1, - .end = IRQ_TC11MP_PMU_CPU1, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_TC11MP_PMU_CPU2, - .end = IRQ_TC11MP_PMU_CPU2, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_TC11MP_PMU_CPU3, - .end = IRQ_TC11MP_PMU_CPU3, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device pmu_device = { - .name = "armv6-pmu", - .id = -1, - .num_resources = ARRAY_SIZE(pmu_resources), - .resource = pmu_resources, -}; - -static void __init gic_init_irq(void) -{ - unsigned int pldctrl; - - /* new irq mode with no DCC */ - writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); - pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1); - pldctrl |= 2 << 22; - writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1); - writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); - - /* ARM11MPCore test chip GIC, primary */ - gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), - __io_address(REALVIEW_TC11MP_GIC_CPU_BASE)); - - /* board GIC, secondary */ - gic_init(1, IRQ_PB11MP_GIC_START, - __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), - __io_address(REALVIEW_PB11MP_GIC_CPU_BASE)); - gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1); -} - -#ifdef CONFIG_HAVE_ARM_TWD -static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, - REALVIEW_TC11MP_TWD_BASE, - IRQ_LOCALTIMER); - -static void __init realview_pb11mp_twd_init(void) -{ - int err = twd_local_timer_register(&twd_local_timer); - if (err) - pr_err("twd_local_timer_register failed %d\n", err); -} -#else -#define realview_pb11mp_twd_init() do {} while(0) -#endif - -static void __init realview_pb11mp_timer_init(void) -{ - timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE); - timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20; - timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE); - timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20; - - realview_clk_init(__io_address(REALVIEW_SYS_BASE), false); - realview_timer_init(IRQ_TC11MP_TIMER0_1); - realview_pb11mp_twd_init(); -} - -static void realview_pb11mp_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); - void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); - - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); - __raw_writel(0x0000, reset_ctrl); - __raw_writel(0x0004, reset_ctrl); - dsb(); -} - -static void __init realview_pb11mp_init(void) -{ - int i; - -#ifdef CONFIG_CACHE_L2X0 - /* - * The PL220 needs to be manually configured as the hardware - * doesn't report the correct sizes. - * 1MB (128KB/way), 8-way associativity, event monitor and - * parity enabled, ignore share bit, no force write allocate - * Bits: .... ...0 0111 1001 0000 .... .... .... - */ - l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff); - /* - * due to a bug in the l220 cache controller, we must not call - * the sync function. stub it out here instead! - */ - outer_cache.sync = NULL; -#endif - - realview_flash_register(realview_pb11mp_flash_resource, - ARRAY_SIZE(realview_pb11mp_flash_resource)); - realview_eth_register(NULL, realview_pb11mp_smsc911x_resources); - platform_device_register(&realview_i2c_device); - platform_device_register(&realview_cf_device); - platform_device_register(&realview_leds_device); - realview_usb_register(realview_pb11mp_isp1761_resources); - platform_device_register(&pmu_device); - - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - amba_device_register(d, &iomem_resource); - } -} - -MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") - /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .atag_offset = 0x100, - .smp = smp_ops(realview_smp_ops), - .fixup = realview_fixup, - .map_io = realview_pb11mp_map_io, - .init_early = realview_init_early, - .init_irq = gic_init_irq, - .init_time = realview_pb11mp_timer_init, - .init_machine = realview_pb11mp_init, -#ifdef CONFIG_ZONE_DMA - .dma_zone_size = SZ_256M, -#endif - .restart = realview_pb11mp_restart, -MACHINE_END diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c deleted file mode 100644 index ddafb67c2b6f..000000000000 --- a/arch/arm/mach-realview/realview_pba8.c +++ /dev/null @@ -1,307 +0,0 @@ -/* - * linux/arch/arm/mach-realview/realview_pba8.c - * - * Copyright (C) 2008 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl061.h> -#include <linux/amba/mmci.h> -#include <linux/amba/pl022.h> -#include <linux/io.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/platform_data/clk-realview.h> -#include <linux/reboot.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/pgtable.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> - -#include "hardware.h" -#include "board-pba8.h" -#include "irqs-pba8.h" - -#include "core.h" - -static struct map_desc realview_pba8_io_desc[] __initdata = { - { - .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), - .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), - .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -#ifdef CONFIG_DEBUG_LL - { - .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -#endif -}; - -static void __init realview_pba8_map_io(void) -{ - iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc)); -} - -static struct pl061_platform_data gpio0_plat_data = { - .gpio_base = 0, -}; - -static struct pl061_platform_data gpio1_plat_data = { - .gpio_base = 8, -}; - -static struct pl061_platform_data gpio2_plat_data = { - .gpio_base = 16, -}; - -static struct pl022_ssp_controller ssp0_plat_data = { - .bus_id = 0, - .enable_dma = 0, - .num_chipselect = 1, -}; - -/* - * RealView PBA8Core AMBA devices - */ - -#define GPIO2_IRQ { IRQ_PBA8_GPIO2 } -#define GPIO3_IRQ { IRQ_PBA8_GPIO3 } -#define AACI_IRQ { IRQ_PBA8_AACI } -#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } -#define KMI0_IRQ { IRQ_PBA8_KMI0 } -#define KMI1_IRQ { IRQ_PBA8_KMI1 } -#define PBA8_SMC_IRQ { } -#define MPMC_IRQ { } -#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } -#define DMAC_IRQ { IRQ_PBA8_DMAC } -#define SCTL_IRQ { } -#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } -#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } -#define GPIO1_IRQ { IRQ_PBA8_GPIO1 } -#define PBA8_RTC_IRQ { IRQ_PBA8_RTC } -#define SCI_IRQ { IRQ_PBA8_SCI } -#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } -#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } -#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } -#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } -#define PBA8_SSP_IRQ { IRQ_PBA8_SSP } - -/* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); - -/* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); - -/* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); - -static struct amba_device *amba_devs[] __initdata = { - &dmac_device, - &uart0_device, - &uart1_device, - &uart2_device, - &uart3_device, - &smc_device, - &clcd_device, - &sctl_device, - &wdog_device, - &gpio0_device, - &gpio1_device, - &gpio2_device, - &rtc_device, - &sci0_device, - &ssp0_device, - &aaci_device, - &mmc0_device, - &kmi0_device, - &kmi1_device, -}; - -/* - * RealView PB-A8 platform devices - */ -static struct resource realview_pba8_flash_resource[] = { - [0] = { - .start = REALVIEW_PBA8_FLASH0_BASE, - .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = REALVIEW_PBA8_FLASH1_BASE, - .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource realview_pba8_smsc911x_resources[] = { - [0] = { - .start = REALVIEW_PBA8_ETH_BASE, - .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PBA8_ETH, - .end = IRQ_PBA8_ETH, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource realview_pba8_isp1761_resources[] = { - [0] = { - .start = REALVIEW_PBA8_USB_BASE, - .end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PBA8_USB, - .end = IRQ_PBA8_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource pmu_resource = { - .start = IRQ_PBA8_PMU, - .end = IRQ_PBA8_PMU, - .flags = IORESOURCE_IRQ, -}; - -static struct platform_device pmu_device = { - .name = "armv7-pmu", - .id = -1, - .num_resources = 1, - .resource = &pmu_resource, -}; - -static void __init gic_init_irq(void) -{ - /* ARM PB-A8 on-board GIC */ - gic_init(0, IRQ_PBA8_GIC_START, - __io_address(REALVIEW_PBA8_GIC_DIST_BASE), - __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); -} - -static void __init realview_pba8_timer_init(void) -{ - timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE); - timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20; - timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE); - timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20; - - realview_clk_init(__io_address(REALVIEW_SYS_BASE), false); - realview_timer_init(IRQ_PBA8_TIMER0_1); -} - -static void realview_pba8_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); - void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); - - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); - __raw_writel(0x0000, reset_ctrl); - __raw_writel(0x0004, reset_ctrl); - dsb(); -} - -static void __init realview_pba8_init(void) -{ - int i; - - realview_flash_register(realview_pba8_flash_resource, - ARRAY_SIZE(realview_pba8_flash_resource)); - realview_eth_register(NULL, realview_pba8_smsc911x_resources); - platform_device_register(&realview_i2c_device); - platform_device_register(&realview_cf_device); - platform_device_register(&realview_leds_device); - realview_usb_register(realview_pba8_isp1761_resources); - platform_device_register(&pmu_device); - - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - amba_device_register(d, &iomem_resource); - } -} - -MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") - /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .atag_offset = 0x100, - .fixup = realview_fixup, - .map_io = realview_pba8_map_io, - .init_early = realview_init_early, - .init_irq = gic_init_irq, - .init_time = realview_pba8_timer_init, - .init_machine = realview_pba8_init, -#ifdef CONFIG_ZONE_DMA - .dma_zone_size = SZ_256M, -#endif - .restart = realview_pba8_restart, -MACHINE_END diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c deleted file mode 100644 index be1cec5fe3ad..000000000000 --- a/arch/arm/mach-realview/realview_pbx.c +++ /dev/null @@ -1,402 +0,0 @@ -/* - * arch/arm/mach-realview/realview_pbx.c - * - * Copyright (C) 2009 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl061.h> -#include <linux/amba/mmci.h> -#include <linux/amba/pl022.h> -#include <linux/io.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/platform_data/clk-realview.h> -#include <linux/reboot.h> -#include <linux/memblock.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> -#include <asm/smp_twd.h> -#include <asm/pgtable.h> -#include <asm/hardware/cache-l2x0.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/time.h> - -#include "hardware.h" -#include "board-pbx.h" -#include "irqs-pbx.h" - -#include "core.h" - -static struct map_desc realview_pbx_io_desc[] __initdata = { - { - .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), - .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBX_GIC_CPU_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_GIC_CPU_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBX_GIC_DIST_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_GIC_DIST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), - .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBX_TIMER0_1_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_TIMER0_1_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBX_TIMER2_3_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_TIMER2_3_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -#ifdef CONFIG_DEBUG_LL - { - .virtual = IO_ADDRESS(REALVIEW_PBX_UART0_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_UART0_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, -#endif -}; - -static struct map_desc realview_local_io_desc[] __initdata = { - { - .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_SCU_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_SCU_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_GIC_DIST_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_GIC_DIST_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = IO_ADDRESS(REALVIEW_PBX_TILE_L220_BASE), - .pfn = __phys_to_pfn(REALVIEW_PBX_TILE_L220_BASE), - .length = SZ_8K, - .type = MT_DEVICE, - } -}; - -static void __init realview_pbx_map_io(void) -{ - iotable_init(realview_pbx_io_desc, ARRAY_SIZE(realview_pbx_io_desc)); - if (core_tile_pbx11mp() || core_tile_pbxa9mp()) - iotable_init(realview_local_io_desc, ARRAY_SIZE(realview_local_io_desc)); -} - -static struct pl061_platform_data gpio0_plat_data = { - .gpio_base = 0, -}; - -static struct pl061_platform_data gpio1_plat_data = { - .gpio_base = 8, -}; - -static struct pl061_platform_data gpio2_plat_data = { - .gpio_base = 16, -}; - -static struct pl022_ssp_controller ssp0_plat_data = { - .bus_id = 0, - .enable_dma = 0, - .num_chipselect = 1, -}; - -/* - * RealView PBXCore AMBA devices - */ - -#define GPIO2_IRQ { IRQ_PBX_GPIO2 } -#define GPIO3_IRQ { IRQ_PBX_GPIO3 } -#define AACI_IRQ { IRQ_PBX_AACI } -#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } -#define KMI0_IRQ { IRQ_PBX_KMI0 } -#define KMI1_IRQ { IRQ_PBX_KMI1 } -#define PBX_SMC_IRQ { } -#define MPMC_IRQ { } -#define PBX_CLCD_IRQ { IRQ_PBX_CLCD } -#define DMAC_IRQ { IRQ_PBX_DMAC } -#define SCTL_IRQ { } -#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } -#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } -#define GPIO1_IRQ { IRQ_PBX_GPIO1 } -#define PBX_RTC_IRQ { IRQ_PBX_RTC } -#define SCI_IRQ { IRQ_PBX_SCI } -#define PBX_UART0_IRQ { IRQ_PBX_UART0 } -#define PBX_UART1_IRQ { IRQ_PBX_UART1 } -#define PBX_UART2_IRQ { IRQ_PBX_UART2 } -#define PBX_UART3_IRQ { IRQ_PBX_UART3 } -#define PBX_SSP_IRQ { IRQ_PBX_SSP } - -/* FPGA Primecells */ -APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); -APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); -APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); -APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); -APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); - -/* DevChip Primecells */ -AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL); -AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); -APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); -APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); -APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); -APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); -APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); -APB_DEVICE(sci0, "dev:sci0", SCI, NULL); -APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); -APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); -APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); -APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); - -/* Primecells on the NEC ISSP chip */ -AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); -AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); - -static struct amba_device *amba_devs[] __initdata = { - &dmac_device, - &uart0_device, - &uart1_device, - &uart2_device, - &uart3_device, - &smc_device, - &clcd_device, - &sctl_device, - &wdog_device, - &gpio0_device, - &gpio1_device, - &gpio2_device, - &rtc_device, - &sci0_device, - &ssp0_device, - &aaci_device, - &mmc0_device, - &kmi0_device, - &kmi1_device, -}; - -/* - * RealView PB-X platform devices - */ -static struct resource realview_pbx_flash_resources[] = { - [0] = { - .start = REALVIEW_PBX_FLASH0_BASE, - .end = REALVIEW_PBX_FLASH0_BASE + REALVIEW_PBX_FLASH0_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = REALVIEW_PBX_FLASH1_BASE, - .end = REALVIEW_PBX_FLASH1_BASE + REALVIEW_PBX_FLASH1_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource realview_pbx_smsc911x_resources[] = { - [0] = { - .start = REALVIEW_PBX_ETH_BASE, - .end = REALVIEW_PBX_ETH_BASE + SZ_64K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PBX_ETH, - .end = IRQ_PBX_ETH, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource realview_pbx_isp1761_resources[] = { - [0] = { - .start = REALVIEW_PBX_USB_BASE, - .end = REALVIEW_PBX_USB_BASE + SZ_128K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PBX_USB, - .end = IRQ_PBX_USB, - .flags = IORESOURCE_IRQ, - }, -}; - -#ifdef CONFIG_CACHE_L2X0 -static struct resource pmu_resources[] = { - [0] = { - .start = IRQ_PBX_PMU_CPU0, - .end = IRQ_PBX_PMU_CPU0, - .flags = IORESOURCE_IRQ, - }, - [1] = { - .start = IRQ_PBX_PMU_CPU1, - .end = IRQ_PBX_PMU_CPU1, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = IRQ_PBX_PMU_CPU2, - .end = IRQ_PBX_PMU_CPU2, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_PBX_PMU_CPU3, - .end = IRQ_PBX_PMU_CPU3, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device pmu_device = { - .name = "armv7-pmu", - .id = -1, - .num_resources = ARRAY_SIZE(pmu_resources), - .resource = pmu_resources, -}; -#endif - -static void __init gic_init_irq(void) -{ - /* ARM PBX on-board GIC */ - if (core_tile_pbx11mp() || core_tile_pbxa9mp()) { - gic_init(0, 29, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE), - __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE)); - } else { - gic_init(0, IRQ_PBX_GIC_START, - __io_address(REALVIEW_PBX_GIC_DIST_BASE), - __io_address(REALVIEW_PBX_GIC_CPU_BASE)); - } -} - -#ifdef CONFIG_HAVE_ARM_TWD -static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, - REALVIEW_PBX_TILE_TWD_BASE, - IRQ_LOCALTIMER); - -static void __init realview_pbx_twd_init(void) -{ - int err = twd_local_timer_register(&twd_local_timer); - if (err) - pr_err("twd_local_timer_register failed %d\n", err); -} -#else -#define realview_pbx_twd_init() do { } while(0) -#endif - -static void __init realview_pbx_timer_init(void) -{ - timer0_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE); - timer1_va_base = __io_address(REALVIEW_PBX_TIMER0_1_BASE) + 0x20; - timer2_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE); - timer3_va_base = __io_address(REALVIEW_PBX_TIMER2_3_BASE) + 0x20; - - realview_clk_init(__io_address(REALVIEW_SYS_BASE), false); - realview_timer_init(IRQ_PBX_TIMER0_1); - realview_pbx_twd_init(); -} - -static void realview_pbx_fixup(struct tag *tags, char **from) -{ -#ifdef CONFIG_SPARSEMEM - /* - * Memory configuration with SPARSEMEM enabled on RealView PBX (see - * asm/mach/memory.h for more information). - */ - - memblock_add(0, SZ_256M); - memblock_add(0x20000000, SZ_512M); - memblock_add(0x80000000, SZ_256M); -#else - realview_fixup(tags, from); -#endif -} - -static void realview_pbx_restart(enum reboot_mode mode, const char *cmd) -{ - void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); - void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); - - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); - __raw_writel(0x00F0, reset_ctrl); - __raw_writel(0x00F4, reset_ctrl); - dsb(); -} - -static void __init realview_pbx_init(void) -{ - int i; - -#ifdef CONFIG_CACHE_L2X0 - if (core_tile_pbxa9mp()) { - void __iomem *l2x0_base = - __io_address(REALVIEW_PBX_TILE_L220_BASE); - - /* set RAM latencies to 1 cycle for eASIC */ - writel(0, l2x0_base + L310_TAG_LATENCY_CTRL); - writel(0, l2x0_base + L310_DATA_LATENCY_CTRL); - - /* 16KB way size, 8-way associativity, parity disabled - * Bits: .. 0 0 0 0 1 00 1 0 1 001 0 000 0 .... .... .... */ - l2x0_init(l2x0_base, 0x02520000, 0xc0000fff); - platform_device_register(&pmu_device); - } -#endif - - realview_flash_register(realview_pbx_flash_resources, - ARRAY_SIZE(realview_pbx_flash_resources)); - realview_eth_register(NULL, realview_pbx_smsc911x_resources); - platform_device_register(&realview_i2c_device); - platform_device_register(&realview_cf_device); - platform_device_register(&realview_leds_device); - realview_usb_register(realview_pbx_isp1761_resources); - - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - amba_device_register(d, &iomem_resource); - } -} - -MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") - /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .atag_offset = 0x100, - .smp = smp_ops(realview_smp_ops), - .fixup = realview_pbx_fixup, - .map_io = realview_pbx_map_io, - .init_early = realview_init_early, - .init_irq = gic_init_irq, - .init_time = realview_pbx_timer_init, - .init_machine = realview_pbx_init, -#ifdef CONFIG_ZONE_DMA - .dma_zone_size = SZ_256M, -#endif - .restart = realview_pbx_restart, -MACHINE_END |
