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| author | Chen-Yu Tsai <wens@csie.org> | 2015-01-06 10:35:20 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-01-21 09:58:59 +0100 |
| commit | 882facf7400f4acecc814977e980cd6f7e7ae718 (patch) | |
| tree | 5e3259f66d25e11026b684a6bac284d65104e233 /arch/arm | |
| parent | d96b7161916f1b5c1a676fba2d54ef0106a88aff (diff) | |
| download | talos-obmc-linux-882facf7400f4acecc814977e980cd6f7e7ae718.tar.gz talos-obmc-linux-882facf7400f4acecc814977e980cd6f7e7ae718.zip | |
ARM: dts: sun5i: Add cpu clock reference and operating points to dtsi
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.
The operating points were taken from the A13 FEX files in the
sunxi-boards repository. All FEX files have the same settings.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/sun5i-a13.dtsi | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index b3c3573f8fbc..dee2aa5bc9ed 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -27,10 +27,26 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; + clocks = <&cpu>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1104000 1500000 + 1008000 1400000 + 912000 1350000 + 864000 1300000 + 624000 1200000 + 576000 1200000 + 432000 1200000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; + cooling-max-level = <6>; }; }; |
