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| author | Will Deacon <will.deacon@arm.com> | 2014-08-22 14:13:24 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2014-08-28 20:01:36 +0100 |
| commit | 27d7ff273c2aad37b28f6ff0cab2cfa35b51e648 (patch) | |
| tree | 1a78d6f0b2a8f0db791d6b7fdffa6f558ba054e4 /arch/arm64/include/asm/hw_breakpoint.h | |
| parent | 5843be2279d7a91ef48c20ac31715d1eb9607a84 (diff) | |
| download | talos-obmc-linux-27d7ff273c2aad37b28f6ff0cab2cfa35b51e648.tar.gz talos-obmc-linux-27d7ff273c2aad37b28f6ff0cab2cfa35b51e648.zip | |
arm64: ptrace: fix compat hardware watchpoint reporting
I'm not sure what I was on when I wrote this, but when iterating over
the hardware watchpoint array (hbp_watch_array), our index is off by
ARM_MAX_BRP, so we walk off the end of our thread_struct...
... except, a dodgy condition in the loop means that it never executes
at all (bp cannot be NULL).
This patch fixes the code so that we remove the bp check and use the
correct index for accessing the watchpoint structures.
Cc: <stable@vger.kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/hw_breakpoint.h')
| -rw-r--r-- | arch/arm64/include/asm/hw_breakpoint.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/hw_breakpoint.h b/arch/arm64/include/asm/hw_breakpoint.h index d064047612b1..52b484b6aa1a 100644 --- a/arch/arm64/include/asm/hw_breakpoint.h +++ b/arch/arm64/include/asm/hw_breakpoint.h @@ -79,7 +79,6 @@ static inline void decode_ctrl_reg(u32 reg, */ #define ARM_MAX_BRP 16 #define ARM_MAX_WRP 16 -#define ARM_MAX_HBP_SLOTS (ARM_MAX_BRP + ARM_MAX_WRP) /* Virtual debug register bases. */ #define AARCH64_DBG_REG_BVR 0 |
