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| author | Olof Johansson <olof@lixom.net> | 2014-07-22 09:17:18 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2014-07-22 09:17:18 -0700 |
| commit | e9a86d96be0dff611156ea89fbb6eb91478bddab (patch) | |
| tree | ad38c21c76e1c275264cb20482a7f2bdd54618ba /arch/arm/mm/cache-l2x0.c | |
| parent | fc3791f3a95df5b76ecbda6952c13ff67251fd10 (diff) | |
| parent | ad8adbf2c7d6269d0100f7f460f4837ece060977 (diff) | |
| download | talos-obmc-linux-e9a86d96be0dff611156ea89fbb6eb91478bddab.tar.gz talos-obmc-linux-e9a86d96be0dff611156ea89fbb6eb91478bddab.zip | |
Merge tag 'sti-defconfig-for-v3.17-1' of git://git.stlinux.com/devel/kernel/linux-sti into next/defconfig
Merge "ARM: STi: defconfig changes for v3.17" from Maxime Coquelin:
STi defconfig updates for v3.17
- Enable ST's Thermal controller driver
- Enable ST's Keyscan driver
- Enable ST's MiPHY365 Phy driver for STiH416 SATA & PCIe
- Enable ST's AHCI driver.
* tag 'sti-defconfig-for-v3.17-1' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: multi_v7_defconfig: Enable MiPHY365x - ST's Generic (SATA & PCIe) PHY
ARM: multi_v7_defconfig: Enable ST's (S)ATA driver
ARM: multi_v7_defconfig: add ST Keyscan driver
ARM: update multi_v7_defconfig for STI
ARM: multi_v7_defconfig: Configure in ST's Thermal Controller
+ Linux 3.16-rc6
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 076172b69422..7c3fb41a462e 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -664,7 +664,7 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock) { - unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK; + unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK; bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9; if (rev >= L310_CACHE_ID_RTL_R2P0) { |
