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authorArnd Bergmann <arnd@arndb.de>2012-09-04 15:01:37 +0200
committerArnd Bergmann <arnd@arndb.de>2012-09-04 15:01:37 +0200
commit863e99a8c1ea2b0391491904297f57a0f6a1fdd6 (patch)
tree0e7789f83c0ba3a1bc3c19d3ccf5ea6f84f19db6 /arch/arm/mach-s5pc100/setup-spi.c
parentdd9bf78040fa0da4cecc228e1682b9682b8cb180 (diff)
parenta849088aa1552b1a28eea3daff599ee22a734ae3 (diff)
downloadtalos-obmc-linux-863e99a8c1ea2b0391491904297f57a0f6a1fdd6.tar.gz
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Merge commit 'a849088aa1' from rmk/fixes into cleanup/io-pci
As Stephen Rothwell reports, a849088aa155 ("ARM: Fix ioremap() of address zero") from the arm-current tree and commit c2794437091a ("ARM: Add fixed PCI i/o mapping") from the arm-soc tree conflict in a nontrivial way in arch/arm/mm/mmu.c. Rob Herring explains: The PCI i/o reserved area has a dummy physical address of 0 and needs to be skipped by ioremap searches. So we don't set VM_ARM_STATIC_MAPPING to prevent matches by ioremap. The vm_struct settings don't really matter when we do the real mapping of the i/o space. Since commit a849088aa155 is at the start of the fixes branch in the arm tree, we can merge it into the branch that contains the other ioremap changes. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s5pc100/setup-spi.c')
-rw-r--r--arch/arm/mach-s5pc100/setup-spi.c30
1 files changed, 3 insertions, 27 deletions
diff --git a/arch/arm/mach-s5pc100/setup-spi.c b/arch/arm/mach-s5pc100/setup-spi.c
index 431a6f747caa..183567961de1 100644
--- a/arch/arm/mach-s5pc100/setup-spi.c
+++ b/arch/arm/mach-s5pc100/setup-spi.c
@@ -9,20 +9,10 @@
*/
#include <linux/gpio.h>
-#include <linux/platform_device.h>
-
#include <plat/gpio-cfg.h>
-#include <plat/s3c64xx-spi.h>
#ifdef CONFIG_S3C64XX_DEV_SPI0
-struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
- .fifo_lvl_mask = 0x7f,
- .rx_lvl_offset = 13,
- .high_speed = 1,
- .tx_st_done = 21,
-};
-
-int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi0_cfg_gpio(void)
{
s3c_gpio_cfgall_range(S5PC100_GPB(0), 3,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
@@ -31,14 +21,7 @@ int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
#endif
#ifdef CONFIG_S3C64XX_DEV_SPI1
-struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
- .fifo_lvl_mask = 0x7f,
- .rx_lvl_offset = 13,
- .high_speed = 1,
- .tx_st_done = 21,
-};
-
-int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi1_cfg_gpio(void)
{
s3c_gpio_cfgall_range(S5PC100_GPB(4), 3,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
@@ -47,14 +30,7 @@ int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
#endif
#ifdef CONFIG_S3C64XX_DEV_SPI2
-struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
- .fifo_lvl_mask = 0x7f,
- .rx_lvl_offset = 13,
- .high_speed = 1,
- .tx_st_done = 21,
-};
-
-int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
+int s3c64xx_spi2_cfg_gpio(void)
{
s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
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