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| author | Abhilash Kesavan <a.kesavan@samsung.com> | 2011-10-04 20:30:22 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-04 20:31:24 +0900 |
| commit | 6b6844dd54e4196dd9818bc63b319f93c37a08be (patch) | |
| tree | c01749ce969969da4273a51cc054a089d60eb83b /arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | |
| parent | e2e13621b267f88f69917780e107725d2c0ecad9 (diff) | |
| download | talos-obmc-linux-6b6844dd54e4196dd9818bc63b319f93c37a08be.tar.gz talos-obmc-linux-6b6844dd54e4196dd9818bc63b319f93c37a08be.zip | |
ARM: S5P64X0: Add Power Management support
Add suspend-to-ram support for SMDK6440/50
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0/include/mach/regs-gpio.h')
| -rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/regs-gpio.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h index 88269ec70a38..cfdfa4fdadf2 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h @@ -37,15 +37,32 @@ #define S5P64X0_SPCON0 (S5P_VA_GPIO + 0x1A0) #define S5P64X0_SPCON0_LCD_SEL_MASK (0x3 << 0) #define S5P64X0_SPCON0_LCD_SEL_RGB (0x1 << 0) +#define S5P64X0_SPCON1 (S5P_VA_GPIO + 0x2B0) + +#define S5P64X0_MEM0CONSLP0 (S5P_VA_GPIO + 0x1C0) +#define S5P64X0_MEM0CONSLP1 (S5P_VA_GPIO + 0x1C4) +#define S5P64X0_MEM0DRVCON (S5P_VA_GPIO + 0x1D0) +#define S5P64X0_MEM1DRVCON (S5P_VA_GPIO + 0x1D4) + +#define S5P64X0_EINT12CON (S5P_VA_GPIO + 0x200) +#define S5P64X0_EINT12FLTCON (S5P_VA_GPIO + 0x220) +#define S5P64X0_EINT12MASK (S5P_VA_GPIO + 0x240) /* External interrupt control registers for group0 */ #define EINT0CON0_OFFSET (0x900) +#define EINT0FLTCON0_OFFSET (0x910) +#define EINT0FLTCON1_OFFSET (0x914) #define EINT0MASK_OFFSET (0x920) #define EINT0PEND_OFFSET (0x924) #define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) +#define S5P64X0_EINT0FLTCON0 (S5P_VA_GPIO + EINT0FLTCON0_OFFSET) +#define S5P64X0_EINT0FLTCON1 (S5P_VA_GPIO + EINT0FLTCON1_OFFSET) #define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) #define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) +#define S5P64X0_SLPEN (S5P_VA_GPIO + 0x930) +#define S5P64X0_SLPEN_USE_xSLP (1 << 0) + #endif /* __ASM_ARCH_REGS_GPIO_H */ |
