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| author | Olof Johansson <olof@lixom.net> | 2012-05-10 23:32:04 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-05-10 23:32:04 -0700 |
| commit | 5056c073d1a4cfcbbf3bb224f3bc04090fe54aec (patch) | |
| tree | 35aa0c30edce763bea5479f68c0365d35a668575 /arch/arm/mach-omap2/irq.c | |
| parent | 812655e9c199c13cad206b40237463f861e3c5a6 (diff) | |
| parent | bb6abcf440c4c861a2131c0651b683dbd2edba84 (diff) | |
| download | talos-obmc-linux-5056c073d1a4cfcbbf3bb224f3bc04090fe54aec.tar.gz talos-obmc-linux-5056c073d1a4cfcbbf3bb224f3bc04090fe54aec.zip | |
Merge tag 'omap-cleanup-renames-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup2
Simplify some SoC config options before things get too unreadable.
Note that this depends on a fix in omap-fixes-non-critical-for-v3.5,
so it's based on that.
By Kevin Hilman (3) and others
via Tony Lindgren
* tag 'omap-cleanup-renames-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Kconfig: convert SOC_OMAPAM33XX to SOC_AM33XX
ARM: OMAP2+: Kconfig: convert SOC_OMAPTI81XX to SOC_TI81XX
ARM: OMAP: igep0020: Specify the VPLL2 regulator unconditionally
ARM: OMAP2+: INTC: fix Kconfig option for TI81XX
ARM: OMAP2+: remove incorrect irq_chip ack field
ARM: OMAP4: Adding ID for OMAP4460 ES1.1
ARM: OMAP4: panda: add statics to remove warnings
ARM: OMAP2+: Incorrect Register Offsets in OMAP Mailbox
ARM: OMAP: fix trivial warnings for dspbridge
ARM: OMAP4: hsmmc: check for null pointer
ARM: OMAP1: fix compilation issue in board-sx1.c
Diffstat (limited to 'arch/arm/mach-omap2/irq.c')
| -rw-r--r-- | arch/arm/mach-omap2/irq.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 65f0d2571c9a..12949dd3c156 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -149,7 +149,6 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ct->chip.irq_mask = irq_gc_mask_disable_reg; ct->chip.irq_unmask = irq_gc_unmask_enable_reg; - ct->regs.ack = INTC_CONTROL; ct->regs.enable = INTC_MIR_CLEAR0; ct->regs.disable = INTC_MIR_SET0; irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, @@ -231,7 +230,7 @@ static inline void omap_intc_handle_irq(void __iomem *base_addr, struct pt_regs goto out; irqnr = readl_relaxed(base_addr + 0xd8); -#ifdef CONFIG_SOC_OMAPTI816X +#ifdef CONFIG_SOC_TI81XX if (irqnr) goto out; irqnr = readl_relaxed(base_addr + 0xf8); |
