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author | Sekhar Nori <nsekhar@ti.com> | 2011-07-06 06:01:23 +0000 |
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committer | Sekhar Nori <nsekhar@ti.com> | 2011-07-08 11:13:08 +0530 |
commit | cbb2c9617ae80c99a7b290dbe5cf48ebf9a36ad9 (patch) | |
tree | ce7c6593adeac4044b5875a04d0ccae648791a6b /arch/arm/mach-davinci/include/mach/da8xx.h | |
parent | aad70de20fc69970a3080e7e8f02b54a4a3fe3e6 (diff) | |
download | talos-obmc-linux-cbb2c9617ae80c99a7b290dbe5cf48ebf9a36ad9.tar.gz talos-obmc-linux-cbb2c9617ae80c99a7b290dbe5cf48ebf9a36ad9.zip |
davinci: da850: add support for SATA interface
Add support for SATA controller on the
DA850/OMAP-L138/AM18x devices.
The patch adds the necessary clocks, platform
resources and a routine to initialize the SATA
controller.
The PHY configuration in this patch is
courtesy the work done by Zegeye Alemu,
Swaminathan and Mansoor Ahamed from TI.
While testing this patch, enable port multiplier
support iff you are actually using one. The
reasons of this behaviour are discussed
here: http://patchwork.ozlabs.org/patch/78163/
ChangeLog:
v3:
Removed fields which were being initialized
to zero in PHY configuration. Moved SATA base
address definition to the top of the file to
make it inline with what is done for the rest
of the modules.
v2:
Addressed comments from Sergei. Removed unnecessary
braces and removed unnecessary else after goto.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/da8xx.h')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/da8xx.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index ad64da713fc8..eaca7d8b9d68 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -57,6 +57,7 @@ extern unsigned int da850_max_speed; #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) #define DA8XX_DEEPSLEEP_REG 0x8 +#define DA8XX_PWRDN_REG 0x18 #define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PLL0_BASE 0x01c11000 @@ -89,6 +90,7 @@ int da850_register_cpufreq(char *async_clk); int da8xx_register_cpuidle(void); void __iomem * __init da8xx_get_mem_ctlr(void); int da850_register_pm(struct platform_device *pdev); +int __init da850_register_sata(unsigned long refclkpn); extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata; |