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| author | Albin Tonnerre <albin.tonnerre@free-electrons.com> | 2009-11-01 18:40:50 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-10 23:46:35 +0000 |
| commit | 1ea60cf7062271f0d53d09268726aa1544bf4836 (patch) | |
| tree | 4e975655fa555fd2346ec50112fbbc8244cb03da /arch/arm/mach-at91/pm.c | |
| parent | cd3abf98aeaec9b23a926159856b54a95707ee88 (diff) | |
| download | talos-obmc-linux-1ea60cf7062271f0d53d09268726aa1544bf4836.tar.gz talos-obmc-linux-1ea60cf7062271f0d53d09268726aa1544bf4836.zip | |
ARM: 5778/1: AT91: Add cpuidle support
This patch adds the support for cpuidle on AT91 SoCs, taken from the
cpuidle support in mach-kirkwood.
cpuidle needs sdram_selfrefresh_enable and _disable, so move their
definition to a separate header file instead of duplicating the code
already used in pm.c.
Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/pm.c')
| -rw-r--r-- | arch/arm/mach-at91/pm.c | 62 |
1 files changed, 4 insertions, 58 deletions
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 4028724d490d..615668986480 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -29,62 +29,7 @@ #include <mach/cpu.h> #include "generic.h" - -#ifdef CONFIG_ARCH_AT91RM9200 -#include <mach/at91rm9200_mc.h> - -/* - * The AT91RM9200 goes into self-refresh mode with this command, and will - * terminate self-refresh automatically on the next SDRAM access. - */ -#define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1) -#define sdram_selfrefresh_disable() do {} while (0) - -#elif defined(CONFIG_ARCH_AT91CAP9) -#include <mach/at91cap9_ddrsdr.h> - -static u32 saved_lpr; - -static inline void sdram_selfrefresh_enable(void) -{ - u32 lpr; - - saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); - - lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; - at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); -} - -#define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) - -#else -#include <mach/at91sam9_sdramc.h> - -#ifdef CONFIG_ARCH_AT91SAM9263 -/* - * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; - * handle those cases both here and in the Suspend-To-RAM support. - */ -#define AT91_SDRAMC AT91_SDRAMC0 -#warning Assuming EB1 SDRAM controller is *NOT* used -#endif - -static u32 saved_lpr; - -static inline void sdram_selfrefresh_enable(void) -{ - u32 lpr; - - saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); - - lpr = saved_lpr & ~AT91_SDRAMC_LPCB; - at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); -} - -#define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) - -#endif - +#include "pm.h" /* * Show the reason for the previous system reset. @@ -260,6 +205,7 @@ extern u32 at91_slow_clock_sz; static int at91_pm_enter(suspend_state_t state) { + u32 saved_lpr; at91_gpio_suspend(); at91_irq_suspend(); @@ -315,9 +261,9 @@ static int at91_pm_enter(suspend_state_t state) */ asm("b 1f; .align 5; 1:"); asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ - sdram_selfrefresh_enable(); + saved_lpr = sdram_selfrefresh_enable(); asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ - sdram_selfrefresh_disable(); + sdram_selfrefresh_disable(saved_lpr); break; case PM_SUSPEND_ON: |
