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author | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 14:23:44 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 14:23:44 +0100 |
commit | 94314a40bcc537c396012e37cf887572f0d82aef (patch) | |
tree | 489b42e181317730713f8800ac2889039b0faae3 /arch/arm/include/asm/hardware | |
parent | 929f58aeeb46f964d9468ce1addd993f5d92b11d (diff) | |
parent | f37a53cc5d8a8fb199e41386d125d8c2ed9e54ef (diff) | |
download | talos-obmc-linux-94314a40bcc537c396012e37cf887572f0d82aef.tar.gz talos-obmc-linux-94314a40bcc537c396012e37cf887572f0d82aef.zip |
Merge branch 'dt/gic' into imx/imx6q
Diffstat (limited to 'arch/arm/include/asm/hardware')
-rw-r--r-- | arch/arm/include/asm/hardware/entry-macro-gic.S | 19 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/gic.h | 11 |
2 files changed, 10 insertions, 20 deletions
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S index c115b82fe80a..74ebc803904d 100644 --- a/arch/arm/include/asm/hardware/entry-macro-gic.S +++ b/arch/arm/include/asm/hardware/entry-macro-gic.S @@ -22,15 +22,11 @@ * interrupt controller spec. To wit: * * Interrupts 0-15 are IPI - * 16-28 are reserved - * 29-31 are local. We allow 30 to be used for the watchdog. + * 16-31 are local. We allow 30 to be used for the watchdog. * 32-1020 are global * 1021-1022 are reserved * 1023 is "spurious" (no interrupt) * - * For now, we ignore all local interrupts so only return an interrupt if it's - * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. - * * A simple read from the controller will tell us the number of the highest * priority enabled interrupt. We then just need to check whether it is in the * valid range for an IRQ (30-1020 inclusive). @@ -43,7 +39,7 @@ ldr \tmp, =1021 bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #29 + cmp \irqnr, #15 cmpcc \irqnr, \irqnr cmpne \irqnr, \tmp cmpcs \irqnr, \irqnr @@ -62,14 +58,3 @@ strcc \irqstat, [\base, #GIC_CPU_EOI] cmpcs \irqnr, \irqnr .endm - -/* As above, this assumes that irqstat and base are preserved.. */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #29 - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 - .endm diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index c5627057b1c7..3e91f22046f5 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -33,17 +33,19 @@ #define GIC_DIST_SOFTINT 0xf00 #ifndef __ASSEMBLY__ +#include <linux/irqdomain.h> +struct device_node; + extern void __iomem *gic_cpu_base_addr; extern struct irq_chip gic_arch_extn; -void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); +void gic_init(unsigned int, int, void __iomem *, void __iomem *); +int gic_of_init(struct device_node *node, struct device_node *parent); void gic_secondary_init(unsigned int); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); -void gic_enable_ppi(unsigned int); struct gic_chip_data { - unsigned int irq_offset; void __iomem *dist_base; void __iomem *cpu_base; #ifdef CONFIG_CPU_PM @@ -53,6 +55,9 @@ struct gic_chip_data { u32 __percpu *saved_ppi_enable; u32 __percpu *saved_ppi_conf; #endif +#ifdef CONFIG_IRQ_DOMAIN + struct irq_domain domain; +#endif unsigned int gic_irqs; }; #endif |