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| author | Tony Lindgren <tony@atomide.com> | 2010-01-19 16:40:07 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-01-19 20:23:16 +0000 |
| commit | 200b7a8dc09504bc0aedac567a307a6e533f39e5 (patch) | |
| tree | ec735fed9611efcbafd4982cb015eab58b552f27 /arch/arm/boot | |
| parent | a7b22962776109b5bfe3a3efa4f42622318c547d (diff) | |
| download | talos-obmc-linux-200b7a8dc09504bc0aedac567a307a6e533f39e5.tar.gz talos-obmc-linux-200b7a8dc09504bc0aedac567a307a6e533f39e5.zip | |
ARM: 5884/1: arm: Fix DCC console for v7
Without this patch arch/arm/compressed/head.S defaults to generic
DCC code that does not work for v7.
For more information on the v7 DCC, see Cortex-A8 TRM
"12.11.1 Debug communications channel".
To use it with post 2.6.33-rc1 or later, you need to have:
CONFIG_DEBUG_LL=y
ONFIG_DEBUG_ICEDCC=y
CONFIG_EARLY_PRINTK=y
Earlier kernels need commit 93fd03a8c6728b58879f8af20ffd55d9c32a778b
backported.
Tested on omap3430.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/compressed/head.S | 8 | ||||
| -rw-r--r-- | arch/arm/boot/compressed/misc.c | 12 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index d356af7cef82..4fddc509e78e 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -27,6 +27,14 @@ .macro writeb, ch, rb mcr p14, 0, \ch, c0, c5, 0 .endm +#elif defined(CONFIG_CPU_V7) + .macro loadsp, rb + .endm + .macro writeb, ch, rb +wait: mrc p14, 0, pc, c0, c1, 0 + bcs wait + mcr p14, 0, \ch, c0, c5, 0 + .endm #elif defined(CONFIG_CPU_XSCALE) .macro loadsp, rb .endm diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index af6479fae931..56a0d116d271 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c @@ -53,6 +53,18 @@ static void icedcc_putc(int ch) asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); } + +#elif defined(CONFIG_CPU_V7) + +static void icedcc_putc(int ch) +{ + asm( + "wait: mrc p14, 0, pc, c0, c1, 0 \n\ + bcs wait \n\ + mcr p14, 0, %0, c0, c5, 0 " + : : "r" (ch)); +} + #elif defined(CONFIG_CPU_XSCALE) static void icedcc_putc(int ch) |
