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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-09-22 14:58:23 +0900 |
|---|---|---|
| committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-09-22 09:04:42 +0200 |
| commit | e8901f3ab5b5c2ce75abdcd182b07d00fd6746fe (patch) | |
| tree | 379109add3ba44ad6b2f04b671f9923df1baa6c6 /Documentation/devicetree/bindings | |
| parent | 89dcb27b09fdcc8b585791815be07413d0487102 (diff) | |
| download | talos-obmc-linux-e8901f3ab5b5c2ce75abdcd182b07d00fd6746fe.tar.gz talos-obmc-linux-e8901f3ab5b5c2ce75abdcd182b07d00fd6746fe.zip | |
dt-bindings: nand: denali: reduce the register space in the example
This example allocates much more than needed for address regions.
As for "denali_reg", as you see in drivers/mtd/nand/denali.h, all
registers fit in 0x1000.
As for "nand_data", this IP is generally configured to use Indexed
Addressing mode, where there are only two registers in the address
translation module (CTRL: 0x00, DATA: 0x10). Altera SOCFPGA is
also this case. So, 0x20 is enough.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/mtd/denali-nand.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt index 504291d2e5c2..0ee8edb60efc 100644 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ b/Documentation/devicetree/bindings/mtd/denali-nand.txt @@ -29,7 +29,7 @@ nand: nand@ff900000 { #address-cells = <1>; #size-cells = <1>; compatible = "altr,socfpga-denali-nand"; - reg = <0xff900000 0x100000>, <0xffb80000 0x10000>; + reg = <0xff900000 0x20>, <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; interrupts = <0 144 4>; }; |
