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author | Meng Dongyang <daniel.meng@rock-chips.com> | 2017-03-06 09:29:36 +0800 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2017-04-10 16:43:41 +0530 |
commit | e3462f9e073ea34c1407a85d3c5fa773202b6797 (patch) | |
tree | dbc0b93ffc347ab7343ee6460d1d72ff8d74c1dd /Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt | |
parent | 5e3bf9c5b70b815f3ded52c0e82aca4fa00c6fc6 (diff) | |
download | talos-obmc-linux-e3462f9e073ea34c1407a85d3c5fa773202b6797.tar.gz talos-obmc-linux-e3462f9e073ea34c1407a85d3c5fa773202b6797.zip |
dt-bindings: phy-rockchip-inno-usb2: add assign clock property in usb2-phy node
On some platform such as RK3328, the 480m clock may need to assign
clock parent in dts in stead of clock driver. So this patch add
property of assigned-clocks and assigned-clock-parents to assign
parent for 480m clock.
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt')
-rw-r--r-- | Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt index 3c29c77a7018..e71a8d23f4a8 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt @@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK Required properties (phy (parent) node): - compatible : should be one of the listed compatibles: + * "rockchip,rk3328-usb2phy" * "rockchip,rk3366-usb2phy" * "rockchip,rk3399-usb2phy" - reg : the address offset of grf for usb-phy configuration. @@ -11,6 +12,11 @@ Required properties (phy (parent) node): Optional properties: - clocks : phandle + phy specifier pair, for the input clock of phy. - clock-names : input clock name of phy, must be "phyclk". + - assigned-clocks : phandle of usb 480m clock. + - assigned-clock-parents : parent of usb 480m clock, select between + usb-phy output 480m and xin24m. + Refer to clk/clock-bindings.txt for generic clock + consumer properties. Required nodes : a sub-node is required for each port the phy provides. The sub-node name is used to identify host or otg port, |