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| author | Pawel Moll <pawel.moll@arm.com> | 2012-10-16 15:27:12 +0100 |
|---|---|---|
| committer | Pawel Moll <pawel.moll@arm.com> | 2012-11-05 17:09:52 +0000 |
| commit | 433683a66401adb0150792e725cc4f631c94de46 (patch) | |
| tree | a820c2b4faddc6109e449a21b551b4a18339c287 /Documentation/devicetree/bindings/arm/vexpress.txt | |
| parent | 38669e045dbf8f62a008898a7fb1e93975b3817c (diff) | |
| download | talos-obmc-linux-433683a66401adb0150792e725cc4f631c94de46.tar.gz talos-obmc-linux-433683a66401adb0150792e725cc4f631c94de46.zip | |
ARM: vexpress: Remove motherboard dependencies in the DTS files
The way the VE motherboard Device Trees were constructed
enforced naming and structure of daughterboard files. This
patch makes it possible to simply include the motherboard
description anywhere in the main Device Tree and retires
the "arm,v2m-timer" alias - any of the motherboard SP804
timers will be used instead.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/vexpress.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/vexpress.txt | 32 |
1 files changed, 22 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/arm/vexpress.txt b/Documentation/devicetree/bindings/arm/vexpress.txt index 5d9996b9eabf..ae49161e478a 100644 --- a/Documentation/devicetree/bindings/arm/vexpress.txt +++ b/Documentation/devicetree/bindings/arm/vexpress.txt @@ -141,14 +141,19 @@ can be used to obtain required phandle in the tile's "aliases" node: - SP804 timers: v2m_timer01 and v2m_timer23 -Current Linux implementation requires a "arm,v2m_timer" alias -pointing at one of the motherboard's SP804 timers, if it is to be -used as the system timer. This alias should be defined in the -motherboard files. - -The tile description must define "ranges", "interrupt-map-mask" and -"interrupt-map" properties to translate the motherboard's address -and interrupt space into one used by the tile's processor. +The tile description should define a "smb" node, describing the +Static Memory Bus between the tile and motherboard. It must define +the following properties: +- "simple-bus" compatible value (to ensure creation of the children) + compatible = "simple-bus"; +- mapping of the SMB CS/offset addresses into main address space: + #address-cells = <2>; + #size-cells = <1>; + ranges = <...>; +- interrupts mapping: + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 63>; + interrupt-map = <...>; Example of a VE tile description (simplified) @@ -200,13 +205,20 @@ Example of a VE tile description (simplified) }; }; - motherboard { + smb { + compatible = "simple-bus"; + + #address-cells = <2>; + #size-cells = <1>; /* CS0 is visible at 0x08000000 */ ranges = <0 0 0x08000000 0x04000000>; + + #interrupt-cells = <1>; interrupt-map-mask = <0 0 63>; /* Active high IRQ 0 is connected to GIC's SPI0 */ interrupt-map = <0 0 0 &gic 0 0 4>; + + /include/ "vexpress-v2m-rs1.dtsi" }; }; -/include/ "vexpress-v2m-rs1.dtsi" |
