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| author | Andrew Jeffery <andrew@aj.id.au> | 2019-04-19 10:21:14 +0930 |
|---|---|---|
| committer | Andrew Jeffery <andrew@aj.id.au> | 2019-04-19 10:26:52 +0930 |
| commit | 9cd6f6c377d4eb61293f0385e2ffbcb2c731dbed (patch) | |
| tree | 7ac4c43fd99dc031e04d1fc59d8c11253e32937a | |
| parent | bc06c97c4df7e9348ae0b8a1a5395caa06f55427 (diff) | |
| download | talos-obmc-linux-9cd6f6c377d4eb61293f0385e2ffbcb2c731dbed.tar.gz talos-obmc-linux-9cd6f6c377d4eb61293f0385e2ffbcb2c731dbed.zip | |
Revert "mtd: spi-nor: aspeed: use memcpy_fromio() to capture the optimization buffer"
This reverts commit cb8980080ccb7879c5a8ef0e3efa783c9288d907.
From Milton:
> NACK
>
> [The] justifcation is false. The routine reads the whole buffer
> because it calls the _rep routine and takes the size.
>
> In addition, the comment just before aspeed_smc_read_from_ahb
> tells why memcpy_fromio and memcpy_toio are broken on 32 bit
> arm, and this is still the case judging from the recent bug
> reportfrom a Nuvoton user [1].
>
> [1] https://github.com/openbmc/openbmc/issues/3521
OpenBMC-Staging-Count: 1
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
| -rw-r--r-- | drivers/mtd/spi-nor/aspeed-smc.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c index 1200b23416e3..aefa795103a5 100644 --- a/drivers/mtd/spi-nor/aspeed-smc.c +++ b/drivers/mtd/spi-nor/aspeed-smc.c @@ -796,7 +796,8 @@ static bool aspeed_smc_check_reads(struct aspeed_smc_chip *chip, int i; for (i = 0; i < 10; i++) { - memcpy_fromio(test_buf, chip->ahb_base, CALIBRATE_BUF_SIZE); + aspeed_smc_read_from_ahb(test_buf, chip->ahb_base, + CALIBRATE_BUF_SIZE); if (memcmp(test_buf, golden_buf, CALIBRATE_BUF_SIZE) != 0) return false; } @@ -927,7 +928,8 @@ static int aspeed_smc_optimize_read(struct aspeed_smc_chip *chip, writel(chip->ctl_val[smc_read], chip->ctl); - memcpy_fromio(golden_buf, chip->ahb_base, CALIBRATE_BUF_SIZE); + aspeed_smc_read_from_ahb(golden_buf, chip->ahb_base, + CALIBRATE_BUF_SIZE); /* Establish our read mode with freq field set to 0 (HCLK/16) */ chip->ctl_val[smc_read] = save_read_val & 0xfffff0ff; |
