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authorNick Kossifidis <mickflemm@gmail.com>2010-11-23 21:02:20 +0200
committerJohn W. Linville <linville@tuxdriver.com>2010-11-30 13:52:34 -0500
commit325089ab5847f5c1e43f42bb90d32f981867c4c1 (patch)
tree6bdd3b750b17f55d4b6ee3ed01a61058fc17b7a5
parentc297560206adf0cda8ce38ef9b20b0a025754c4d (diff)
downloadtalos-obmc-linux-325089ab5847f5c1e43f42bb90d32f981867c4c1.tar.gz
talos-obmc-linux-325089ab5847f5c1e43f42bb90d32f981867c4c1.zip
ath5k: Small cleanup on tweak_initvals
* Now that we properly set rx/tx latencies for AR5311 remove that old buggy part of code left inside ath5k_hw_tweak_initval_settings that was never executed (you can't have an RF5112 radio on a mac older than AR5212). Also use a magic value for 5311 PHY_SCAL value. Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath5k/reg.h1
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c18
2 files changed, 4 insertions, 15 deletions
diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index ca79ecd832fd..4d610617af3c 100644
--- a/drivers/net/wireless/ath/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -2058,6 +2058,7 @@
#define AR5K_PHY_SCAL 0x9878
#define AR5K_PHY_SCAL_32MHZ 0x0000000e
+#define AR5K_PHY_SCAL_32MHZ_5311 0x00000008
#define AR5K_PHY_SCAL_32MHZ_2417 0x0000000a
#define AR5K_PHY_SCAL_32MHZ_HB63 0x00000032
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 7db984ce90fb..c9e5bad7cffc 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -730,24 +730,12 @@ static void ath5k_hw_tweak_initval_settings(struct ath5k_hw *ah,
ath5k_hw_reg_write(ah, data, AR5K_PHY_FRAME_CTL);
}
- if ((ah->ah_radio == AR5K_RF5112) &&
- (ah->ah_mac_srev < AR5K_SREV_AR5211)) {
- u32 usec_reg;
- /* 5311 has different tx/rx latency masks
- * from 5211, since we deal 5311 the same
- * as 5211 when setting initvals, shift
- * values here to their proper locations */
- usec_reg = ath5k_hw_reg_read(ah, AR5K_USEC_5211);
- ath5k_hw_reg_write(ah, usec_reg & (AR5K_USEC_1 |
- AR5K_USEC_32 |
- AR5K_USEC_TX_LATENCY_5211 |
- AR5K_REG_SM(29,
- AR5K_USEC_RX_LATENCY_5210)),
- AR5K_USEC_5211);
+ if (ah->ah_mac_srev < AR5K_SREV_AR5211) {
/* Clear QCU/DCU clock gating register */
ath5k_hw_reg_write(ah, 0, AR5K_QCUDCU_CLKGT);
/* Set DAC/ADC delays */
- ath5k_hw_reg_write(ah, 0x08, AR5K_PHY_SCAL);
+ ath5k_hw_reg_write(ah, AR5K_PHY_SCAL_32MHZ_5311,
+ AR5K_PHY_SCAL);
/* Enable PCU FIFO corruption ECO */
AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW_5211,
AR5K_DIAG_SW_ECO_ENABLE);
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