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authorDaniel Vetter <daniel.vetter@ffwll.ch>2014-02-14 14:01:13 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-02-14 14:17:35 +0100
commita9cc726c8546bc6efa43b86465570a4447a54722 (patch)
treed2b7c679a15073ac1032c1ff136c698155a83a3a
parentbf3d149b25f67f241735b91a56b7f070bc0a5407 (diff)
downloadtalos-obmc-linux-a9cc726c8546bc6efa43b86465570a4447a54722.tar.gz
talos-obmc-linux-a9cc726c8546bc6efa43b86465570a4447a54722.zip
drm/i915: Handle set_cache_level errors in the pipe control scratch setup
Split out from Chris vma-bind rework. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ben Widawsky <benjamin.widawsky@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f256d5fe46f8..0fd6ba0c4418 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -531,7 +531,9 @@ init_pipe_control(struct intel_ring_buffer *ring)
goto err;
}
- i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
+ ret = i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
+ if (ret)
+ goto err_unref;
ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, 0);
if (ret)
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