Talos™ II Linux sources for OpenBMC https://git.raptorcs.com/git/talos-obmc-linux/atom?h=dev-4.13-fsi 2017-09-27T12:43:14+00:00 2017-09-27T12:43:14+00:00 Gary R Hook gary.hook@amd.com 2017-07-25T19:12:11+00:00 urn:sha1:6cd73ad0a033847ee0cab2c6d33835d081fc0c4e commit e652399edba99a5497f0d80f240c9075d3b43493 upstream. Version 5 CCPs have some new requirements for XTS-AES: the type field must be specified, and the key requires 512 bits, with each part occupying 256 bits and padded with zeroes. Signed-off-by: Gary R Hook <ghook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2017-04-05T13:57:07+00:00 Herbert Xu herbert@gondor.apana.org.au 2017-04-05T13:57:07+00:00 urn:sha1:c6dc0609062c6110d04c54e24b81b503eeadb2c8 Merge the crypto tree to resolve conflict between caam changes. 2017-03-24T14:02:55+00:00 Gary R Hook gary.hook@amd.com 2017-03-15T18:21:01+00:00 urn:sha1:36cf515b9bbe298e1ce7384620f0d4ec45ad3328 A version 5 device provides the primitive commands required for AES GCM. This patch adds support for en/decryption. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2017-03-24T14:02:55+00:00 Gary R Hook gary.hook@amd.com 2017-03-15T18:20:52+00:00 urn:sha1:990672d48515ce09c76fcf1ceccee48b0dd1942b Wire up support for Triple DES in ECB mode. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2017-03-24T14:02:54+00:00 Gary R Hook gary.hook@amd.com 2017-03-15T18:20:43+00:00 urn:sha1:ccebcf3f224a44ec8e9c5bfca9d8e5d29298a5a8 Incorporate 384-bit and 512-bit hashing for a version 5 CCP device Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2017-03-16T09:43:08+00:00 Gary R Hook ghook@amd.com 2017-03-10T18:28:18+00:00 urn:sha1:7c468447f40645fbf2a033dfdaa92b1957130d50 The CCP driver generally uses a round-robin approach when assigning operations to available CCPs. For the DMA engine, however, the DMA mappings of the SGs are associated with a specific CCP. When an IOMMU is enabled, the IOMMU is programmed based on this specific device. If the DMA operations are not performed by that specific CCP then addressing errors and I/O page faults will occur. Update the CCP driver to allow a specific CCP device to be requested for an operation and use this in the DMA engine support. Cc: <stable@vger.kernel.org> # 4.9.x- Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2016-10-25T03:08:28+00:00 Paul Bolle pebolle@tiscali.nl 2016-10-20T19:20:59+00:00 urn:sha1:c8d283ff8b0b6b2061dfc137afd6c56608a34bcb The abbreviation for Cryptographic Coprocessor is "CCP". Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2016-08-09T10:47:16+00:00 Gary R Hook gary.hook@amd.com 2016-07-27T00:10:21+00:00 urn:sha1:4b394a232df78414442778b02ca4a388d947d059 Enable equivalent function on a v5 CCP. Add support for a version 5 CCP which enables AES/XTS/SHA services. Also, more work on the data structures to virtualize functionality. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2016-04-20T09:50:06+00:00 Gary R Hook gary.hook@amd.com 2016-04-18T14:21:44+00:00 urn:sha1:58ea8abf490415c390e0cc671e875510c9b66318 The CCP has the ability to provide DMA services to the kernel using pass-through mode of the device. Register these services as general purpose DMA channels. Changes since v2: - Add a Signed-off-by Changes since v1: - Allocate memory for a string in ccp_dmaengine_register - Ensure register/unregister calls are properly ordered - Verified all changed files are listed in the diffstat - Undo some superfluous changes - Added a cc: Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 2016-03-11T13:19:16+00:00 Gary R Hook gary.hook@amd.com 2016-03-01T19:49:15+00:00 urn:sha1:c7019c4d739e79d7baaa13c86dcaaedec8113d70 Future hardware may introduce new algorithms wherein the driver will need to manage resources for different versions of the cryptographic coprocessor. This precursor patch determines the version of the available device, and marks and registers algorithms accordingly. A structure is added which manages the version-specific data. Signed-off-by: Gary R Hook <gary.hook@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>