<feed xmlns='http://www.w3.org/2005/Atom'>
<title>talos-obmc-linux/include/dt-bindings, branch dev-4.13</title>
<subtitle>Talos™ II Linux sources for OpenBMC</subtitle>
<id>https://git.raptorcs.com/git/talos-obmc-linux/atom?h=dev-4.13</id>
<link rel='self' href='https://git.raptorcs.com/git/talos-obmc-linux/atom?h=dev-4.13'/>
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<updated>2018-05-18T07:51:50+00:00</updated>
<entry>
<title>clk: aspeed: Add 24MHz fixed clock</title>
<updated>2018-05-18T07:51:50+00:00</updated>
<author>
<name>Lei YU</name>
<email>mine260309@gmail.com</email>
</author>
<published>2018-05-09T09:35:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=560f4314a01e130d04446ad41a3400f4b2fedd86'/>
<id>urn:sha1:560f4314a01e130d04446ad41a3400f4b2fedd86</id>
<content type='text'>
Add a 24MHz fixed clock that is provided by the input oscillator. This
clock will be used for certain devices, e.g. pwm.

OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU &lt;mine260309@gmail.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Support second reset register</title>
<updated>2018-04-19T04:10:22+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2018-04-10T06:39:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=9e3efb97c78f07a1fa49f9387ace25a1a8a86439'/>
<id>urn:sha1:9e3efb97c78f07a1fa49f9387ace25a1a8a86439</id>
<content type='text'>
The ast2500 has an additional reset register that contains resets not
present in the ast2400. This enables support for this register, and adds
the one reset line that is controlled by it.

OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>dt-binding: clk: npcm750: add binding</title>
<updated>2018-04-11T04:02:30+00:00</updated>
<author>
<name>Tali Perry</name>
<email>tali.perry1@gmail.com</email>
</author>
<published>2018-03-26T10:16:25+00:00</published>
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<id>urn:sha1:f9bf873d72e91285a68c3541913b7ffdc420d58b</id>
<content type='text'>
Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which
generates and supplies clocks to all modules within the BMC.

OpenBMC-Staging-Count: 1
Signed-off-by: Tali Perry &lt;tali.perry1@gmail.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>gpio: gpiolib: Generalise state persistence beyond sleep</title>
<updated>2018-02-08T06:04:00+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2017-11-30T03:55:24+00:00</published>
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<id>urn:sha1:9cd69078324c1e0ca69046db664e142363a46d6c</id>
<content type='text'>
General support for state persistence is added to gpiolib with the
introduction of a new pinconf parameter to propagate the request to
hardware. The existing persistence support for sleep is adapted to
include hardware support if the GPIO driver provides it. Persistence
continues to be enabled by default; in-kernel consumers can opt out, but
userspace (currently) does not have a choice.

The *_SLEEP_MAY_LOSE_VALUE and *_SLEEP_MAINTAIN_VALUE symbols are
renamed, dropping the SLEEP prefix to reflect that the concept is no
longer sleep-specific.  I feel that renaming to just *_MAY_LOSE_VALUE
could initially be misinterpreted, so I've further changed the symbols
to *_TRANSITORY and *_PERSISTENT to address this.

The sysfs interface is modified only to keep consistency with the
chardev interface in enforcing persistence for userspace exports.

Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Reviewed-by: Charles Keepax &lt;ckeepax@opensource.cirrus.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
(cherry picked from commit e10f72bf4b3e8885c1915a119141481e7fc45ca8)
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: gpio: Add ASPEED constants</title>
<updated>2018-01-18T17:06:56+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2017-11-28T13:00:29+00:00</published>
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<id>urn:sha1:88cb0bfe43e6272879fd88277458b3559005003b</id>
<content type='text'>
These are used to by the device tree to map pin numbers to constants
required by the GPIO bindings.

OpenBMC-Staging-Count: 1
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add ASPEED constants</title>
<updated>2018-01-18T17:06:20+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2017-12-11T04:54:37+00:00</published>
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<id>urn:sha1:85dc3230afa26c6cb2e25b0ee2e93cd6bb15a848</id>
<content type='text'>
These will be used by the clock driver. This commit is included so
the tree will build without the clock series being applied.

OpenBMC-Staging-Count: 1
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>leds: pca955x: add GPIO support</title>
<updated>2017-11-28T04:37:43+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2017-08-08T13:42:39+00:00</published>
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<id>urn:sha1:ee7a4b1212541b3b0610ba189bf9f1d7aa41ccea</id>
<content type='text'>
The PCA955x family of chips are I2C LED blinkers whose pins not used
to control LEDs can be used as general purpose I/Os (GPIOs).

The following adds such a support by defining different operation
modes for the pins (See bindings documentation for more details). The
pca955x driver is then extended with a gpio_chip when some of pins are
operating as GPIOs. The default operating mode is to behave as a LED.

The GPIO support is conditioned by CONFIG_LEDS_PCA955X_GPIO.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Acked-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Signed-off-by: Jacek Anaszewski &lt;jacek.anaszewski@gmail.com&gt;
(cherry picked from commit 561099a1a2e992a482a8318c0c9c5af26222e5cd)
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Add reset controller</title>
<updated>2017-10-09T07:00:40+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2017-09-21T03:49:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=0aa00b684c3cde747339458b1b91b8e94130770c'/>
<id>urn:sha1:0aa00b684c3cde747339458b1b91b8e94130770c</id>
<content type='text'>
There are some resets that are not associated with gates. These are
represented by a reset controller.

Reviewed-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: Add clock driver for ASPEED BMC SoCs</title>
<updated>2017-10-09T07:00:40+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2017-09-21T03:07:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=807ea8ad470ab505e6aa8625d26905d03504a23e'/>
<id>urn:sha1:807ea8ad470ab505e6aa8625d26905d03504a23e</id>
<content type='text'>
This adds the stub of a driver for the ASPEED SoCs. The clocks are
defined and the static registration is set up.

Reviewed-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus</title>
<updated>2017-07-15T17:59:54+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-07-15T17:59:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=568d135d337d3114688fef9fdbce7fb6dbbd04c7'/>
<id>urn:sha1:568d135d337d3114688fef9fdbce7fb6dbbd04c7</id>
<content type='text'>
Pull MIPS updates from Ralf Baechle:
 "Boston platform support:
   - Document DT bindings
   - Add CLK driver for board clocks

  CM:
   - Avoid per-core locking with CM3 &amp; higher
   - WARN on attempt to lock invalid VP, not BUG

  CPS:
   - Select CONFIG_SYS_SUPPORTS_SCHED_SMT for MIPSr6
   - Prevent multi-core with dcache aliasing
   - Handle cores not powering down more gracefully
   - Handle spurious VP starts more gracefully

  DSP:
   - Add lwx &amp; lhx missaligned access support

  eBPF:
   - Add MIPS support along with many supporting change to add the
     required infrastructure

  Generic arch code:
   - Misc sysmips MIPS_ATOMIC_SET fixes
   - Drop duplicate HAVE_SYSCALL_TRACEPOINTS
   - Negate error syscall return in trace
   - Correct forced syscall errors
   - Traced negative syscalls should return -ENOSYS
   - Allow samples/bpf/tracex5 to access syscall arguments for sane
     traces
   - Cleanup from old Kconfig options in defconfigs
   - Fix PREF instruction usage by memcpy for MIPS R6
   - Fix various special cases in the FPU eulation
   - Fix some special cases in MIPS16e2 support
   - Fix MIPS I ISA /proc/cpuinfo reporting
   - Sort MIPS Kconfig alphabetically
   - Fix minimum alignment requirement of IRQ stack as required by
     ABI / GCC
   - Fix special cases in the module loader
   - Perform post-DMA cache flushes on systems with MAARs
   - Probe the I6500 CPU
   - Cleanup cmpxchg and add support for 1 and 2 byte operations
   - Use queued read/write locks (qrwlock)
   - Use queued spinlocks (qspinlock)
   - Add CPU shared FTLB feature detection
   - Handle tlbex-tlbp race condition
   - Allow storing pgd in C0_CONTEXT for MIPSr6
   - Use current_cpu_type() in m4kc_tlbp_war()
   - Support Boston in the generic kernel

  Generic platform:
   - yamon-dt: Pull YAMON DT shim code out of SEAD-3 board
   - yamon-dt: Support &gt; 256MB of RAM
   - yamon-dt: Use serial* rather than uart* aliases
   - Abstract FDT fixup application
   - Set RTC_ALWAYS_BCD to 0
   - Add a MAINTAINERS entry

  core kernel:
   - qspinlock.c: include linux/prefetch.h

  Loongson 3:
   - Add support

  Perf:
   - Add I6500 support

  SEAD-3:
   - Remove GIC timer from DT
   - Set interrupt-parent per-device, not at root node
   - Fix GIC interrupt specifiers

  SMP:
   - Skip IPI setup if we only have a single CPU

  VDSO:
   - Make comment match reality
   - Improvements to time code in VDSO"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (86 commits)
  locking/qspinlock: Include linux/prefetch.h
  MIPS: Fix MIPS I ISA /proc/cpuinfo reporting
  MIPS: Fix minimum alignment requirement of IRQ stack
  MIPS: generic: Support MIPS Boston development boards
  MIPS: DTS: img: Don't attempt to build-in all .dtb files
  clk: boston: Add a driver for MIPS Boston board clocks
  dt-bindings: Document img,boston-clock binding
  MIPS: Traced negative syscalls should return -ENOSYS
  MIPS: Correct forced syscall errors
  MIPS: Negate error syscall return in trace
  MIPS: Drop duplicate HAVE_SYSCALL_TRACEPOINTS select
  MIPS16e2: Provide feature overrides for non-MIPS16 systems
  MIPS: MIPS16e2: Report ASE presence in /proc/cpuinfo
  MIPS: MIPS16e2: Subdecode extended LWSP/SWSP instructions
  MIPS: MIPS16e2: Identify ASE presence
  MIPS: VDSO: Fix a mismatch between comment and preprocessor constant
  MIPS: VDSO: Add implementation of gettimeofday() fallback
  MIPS: VDSO: Add implementation of clock_gettime() fallback
  MIPS: VDSO: Fix conversions in do_monotonic()/do_monotonic_coarse()
  MIPS: Use current_cpu_type() in m4kc_tlbp_war()
  ...
</content>
</entry>
</feed>
