talos-obmc-linux/drivers/gpio, branch dev-4.10

gpio: aspeed: Add support for reset tolerance

2018-01-16T17:54:30+00:00

Use the new pinconf parameter for state persistence to expose the associated capability of the Aspeed GPIO controller. Signed-off-by: Andrew Jeffery Reviewed-by: Joel Stanley Signed-off-by: Linus Walleij (cherry picked from commit 1b43d26985745901c87e0dca44c9b57896062306) Signed-off-by: Joel Stanley

gpio: gpiolib: Generalise state persistence beyond sleep

2018-01-16T17:54:29+00:00

General support for state persistence is added to gpiolib with the introduction of a new pinconf parameter to propagate the request to hardware. The existing persistence support for sleep is adapted to include hardware support if the GPIO driver provides it. Persistence continues to be enabled by default; in-kernel consumers can opt out, but userspace (currently) does not have a choice. The *_SLEEP_MAY_LOSE_VALUE and *_SLEEP_MAINTAIN_VALUE symbols are renamed, dropping the SLEEP prefix to reflect that the concept is no longer sleep-specific. I feel that renaming to just *_MAY_LOSE_VALUE could initially be misinterpreted, so I've further changed the symbols to *_TRANSITORY and *_PERSISTENT to address this. The sysfs interface is modified only to keep consistency with the chardev interface in enforcing persistence for userspace exports. Signed-off-by: Andrew Jeffery Reviewed-by: Charles Keepax Acked-by: Rob Herring Signed-off-by: Linus Walleij (cherry picked from commit e10f72bf4b3e8885c1915a119141481e7fc45ca8) Signed-off-by: Joel Stanley

gpio: core: Decouple open drain/source flag with active low/high

2018-01-16T17:54:29+00:00

Currently, the GPIO interface is said to Open Drain if it is Single Ended and active LOW. Similarly, it is said as Open Source if it is Single Ended and active HIGH. The active HIGH/LOW is used in the interface for setting the pin state to HIGH or LOW when enabling/disabling the interface. In Open Drain interface, pin is set to HIGH by putting pin in high impedance and LOW by driving to the LOW. In Open Source interface, pin is set to HIGH by driving pin to HIGH and set to LOW by putting pin in high impedance. With above, the Open Drain/Source is unrelated to the active LOW/HIGH in interface. There is interface where the enable/disable of interface is ether active LOW or HIGH but it is Open Drain type. Hence decouple the Open Drain with Single Ended + Active LOW and Open Source with Single Ended + Active HIGH. Adding different flag for the Open Drain/Open Source which is valid only when Single ended flag is enabled. Signed-off-by: Laxman Dewangan Signed-off-by: Linus Walleij (cherry picked from commit 4c0facddb7d88c78c8bd977c16faa647f079ccda) Signed-off-by: Andrew Jeffery Signed-off-by: Joel Stanley

gpiolib: Convert fwnode_get_named_gpiod() to configure GPIO

2018-01-16T17:54:28+00:00

Make fwnode_get_named_gpiod() consistent with the rest of gpiod_get() like API, i.e. configure GPIO pin immediately after request. Besides obvious clean up it will help to configure pins based on firmware provided resources. Reviewed-by: Mika Westerberg Signed-off-by: Andy Shevchenko Signed-off-by: Linus Walleij (cherry picked from commit a264d10ff45c688293d9112fddd8d29c819e0853) Signed-off-by: Andrew Jeffery Signed-off-by: Joel Stanley

Merge tag 'v4.10.17' into dev-4.10

2017-06-05T02:24:15+00:00

This is the 4.10.17 stable release

gpio: aspeed: Add open-source and open-drain support

2017-04-27T05:03:53+00:00

As per the datasheet, manage the IO and value states to implement open-source/open-drain, but do this by falling back to gpiolib's emulation. This commit simply makes the behaviour explicit for clarity, rather than relying on the implicit return of -ENOTSUPP to trigger the emulation. Signed-off-by: Andrew Jeffery Signed-off-by: Linus Walleij (cherry picked from commit c3bafe017c3bd3f68c21637ce4b78963edf56ec5) Signed-off-by: Joel Stanley

gpio: aspeed: Add debounce support

2017-04-27T05:03:52+00:00

Each GPIO in the Aspeed GPIO controller can choose one of four input debounce states: to disable debouncing for an input, or select from one of three programmable debounce timer values. Each GPIO in a four-bank-set is assigned one bit in each of two debounce configuration registers dedicated to the set, and selects a debounce state by configuring the two bits to select one of the four options. The limitation on debounce timer values is managed by mapping offsets onto a configured timer value and keeping count of the number of users a timer has. Timer values are configured on a first-come-first-served basis. A small twist in the hardware design is that the debounce configuration register numbering is reversed with respect to the binary representation of the debounce timer of interest (i.e. debounce register 1 represents bit 1, and debounce register 2 represents bit 0 of the timer numbering). Tested on an AST2500EVB with additional inspection under QEMU's romulus-bmc machine. Signed-off-by: Andrew Jeffery Signed-off-by: Linus Walleij (cherry picked from commit 5ae4cb94b3133d00857bb2909dae779782db40cb) Signed-off-by: Joel Stanley

pinctrl / gpio: Introduce .set_config() callback for GPIO chips

2017-04-27T05:03:49+00:00

Currently we already have two pin configuration related callbacks available for GPIO chips .set_single_ended() and .set_debounce(). In future we expect to have even more, which does not scale well if we need to add yet another callback to the GPIO chip structure for each possible configuration parameter. Better solution is to reuse what we already have available in the generic pinconf. To support this, we introduce a new .set_config() callback for GPIO chips. The callback takes a single packed pin configuration value as parameter. This can then be extended easily beyond what is currently supported by just adding new types to the generic pinconf enum. If the GPIO driver is backed up by a pinctrl driver the GPIO driver can just assign gpiochip_generic_config() (introduced in this patch) to .set_config and that will take care configuration requests are directed to the pinctrl driver. We then convert the existing drivers over .set_config() and finally remove the .set_single_ended() and .set_debounce() callbacks. Suggested-by: Linus Walleij Signed-off-by: Mika Westerberg Reviewed-by: Andy Shevchenko Signed-off-by: Linus Walleij (cherry picked from commit 2956b5d94a76b596fa5057c2b3ca915cb27d7652) Signed-off-by: Joel Stanley

ACPI / gpio: do not fall back to parsing _CRS when we get a deferral

2017-04-12T10:42:05+00:00

commit 693bdaa164b40b7aa6018b98af6f7e40dbd52457 upstream. If, while locating GPIOs by name, we get probe deferral, we should immediately report it to caller rather than trying to fall back to parsing unnamed GPIOs from _CRS block. Signed-off-by: Dmitry Torokhov Acked-by: Mika Westerberg Acked-and-Tested-by: Hans de Goede Signed-off-by: Linus Walleij Signed-off-by: Greg Kroah-Hartman

gpio: aspeed: Remove dependence on GPIOF_* macros

2017-03-22T13:39:35+00:00

1736f75d35e47409ad776273133d0f558a4c8253 is a (v2) patch which had unresolved review comments[1]. Address the comments by removing the use of macros from the consumer header (this patch represents the diff between v2 and v3[2]). [1] https://lkml.org/lkml/2017/1/26/337 [2] https://lkml.org/lkml/2017/1/26/786 Fixes: 1736f75d35e4 ("gpio: aspeed: Add banks Y, Z, AA, AB and AC") Signed-off-by: Andrew Jeffery Acked-by: Joel Stanley Signed-off-by: Linus Walleij (cherry picked from commit 619e96f4bf9d3d79836c324d59803e3f22606a06) Signed-off-by: Joel Stanley