<feed xmlns='http://www.w3.org/2005/Atom'>
<title>talos-obmc-linux/drivers/clk, branch dev-4.13</title>
<subtitle>Talos™ II Linux sources for OpenBMC</subtitle>
<id>https://git.raptorcs.com/git/talos-obmc-linux/atom?h=dev-4.13</id>
<link rel='self' href='https://git.raptorcs.com/git/talos-obmc-linux/atom?h=dev-4.13'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/'/>
<updated>2018-05-18T08:34:22+00:00</updated>
<entry>
<title>clk: npcm7xx: fix return value check in npcm7xx_clk_init()</title>
<updated>2018-05-18T08:34:22+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyongjun1@huawei.com</email>
</author>
<published>2018-04-26T11:21:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=a4a5f059746b2726c62a3190c5808d070899c62c'/>
<id>urn:sha1:a4a5f059746b2726c62a3190c5808d070899c62c</id>
<content type='text'>
In case of error, the function ioremap() returns NULL pointer not
ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.

OpenBMC-Staging-Count: 1
Fixes: fcfd14369856 ("clk: npcm7xx: add clock controller")
Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Add 24MHz fixed clock</title>
<updated>2018-05-18T07:51:50+00:00</updated>
<author>
<name>Lei YU</name>
<email>mine260309@gmail.com</email>
</author>
<published>2018-05-09T09:35:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=560f4314a01e130d04446ad41a3400f4b2fedd86'/>
<id>urn:sha1:560f4314a01e130d04446ad41a3400f4b2fedd86</id>
<content type='text'>
Add a 24MHz fixed clock that is provided by the input oscillator. This
clock will be used for certain devices, e.g. pwm.

OpenBMC-Staging-Count: 1
Signed-off-by: Lei YU &lt;mine260309@gmail.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Fix reset assert logic</title>
<updated>2018-04-26T02:14:59+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@linux.intel.com</email>
</author>
<published>2018-04-25T22:33:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=e18cfdc2840ac60e6b1d0b117678306e3582d8ed'/>
<id>urn:sha1:e18cfdc2840ac60e6b1d0b117678306e3582d8ed</id>
<content type='text'>
This commit fixes a bug in aspeed_reset_assert() which determines
the second reset register using condition.

OpenBMC-Staging-Count: 1
Fixes: 9e3efb97c78f ("clk: aspeed: Support second reset register")
Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@linux.intel.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Support second reset register</title>
<updated>2018-04-19T04:10:22+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2018-04-10T06:39:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=9e3efb97c78f07a1fa49f9387ace25a1a8a86439'/>
<id>urn:sha1:9e3efb97c78f07a1fa49f9387ace25a1a8a86439</id>
<content type='text'>
The ast2500 has an additional reset register that contains resets not
present in the ast2400. This enables support for this register, and adds
the one reset line that is controlled by it.

OpenBMC-Staging-Count: 1
Reviewed-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: npcm7xx: add clock controller</title>
<updated>2018-04-11T04:02:30+00:00</updated>
<author>
<name>Tali Perry</name>
<email>tali.perry1@gmail.com</email>
</author>
<published>2018-03-26T10:16:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=fc378ace3588a1676e1946fc55e3867d92e81e1c'/>
<id>urn:sha1:fc378ace3588a1676e1946fc55e3867d92e81e1c</id>
<content type='text'>
Nuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which
generates and supplies clocks to all modules within the BMC.

OpenBMC-Staging-Count: 1
Signed-off-by: Tali Perry &lt;tali.perry1@gmail.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Mark bclk (PCIe) and dclk (VGA) as critical</title>
<updated>2018-03-28T04:25:36+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2018-03-28T03:27:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=d86bf903d3fe4d19b3b11c92b19b736ee07edc5d'/>
<id>urn:sha1:d86bf903d3fe4d19b3b11c92b19b736ee07edc5d</id>
<content type='text'>
This is used by the host to talk to the BMC's PCIe slave device. The BMC
is not involved, but the clock needs to be enabled so the host can use
the device.

OpenBMC-Staging-Count: 1
Acked-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Tested-by: Lei YU &lt;mine260309@gmail.com&gt;
Signed-off-by: Lei YU &lt;mine260309@gmail.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Fix is_enabled for certain clocks</title>
<updated>2018-03-13T05:45:18+00:00</updated>
<author>
<name>Eddie James</name>
<email>eajames@linux.vnet.ibm.com</email>
</author>
<published>2018-03-08T20:57:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=10b851282c682c9bf4865bf44b3fb7ab265032b5'/>
<id>urn:sha1:10b851282c682c9bf4865bf44b3fb7ab265032b5</id>
<content type='text'>
Some of the Aspeed clocks are disabled by setting the relevant bit in
the "clock stop control" register to one, while others are disabled by
setting their bit to zero. The driver already uses a flag per gate  to
identify this behavior, but doesn't apply it in the clock is_enabled
function.

Use the existing gate flag to correctly return whether or not a clock
is enabled in the aspeed_clk_is_enabled function.

OpenBMC-Staging-Count: 1
Signed-off-by: Eddie James &lt;eajames@linux.vnet.ibm.com&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Prevent reset if clock is enabled</title>
<updated>2018-03-08T05:49:37+00:00</updated>
<author>
<name>Eddie James</name>
<email>eajames@linux.vnet.ibm.com</email>
</author>
<published>2018-03-08T03:54:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=b9d07b242af0251e890a6919c098cb372d51571a'/>
<id>urn:sha1:b9d07b242af0251e890a6919c098cb372d51571a</id>
<content type='text'>
According to the ASPEED specification, the reset and enable sequence
should be done when the clock is stopped. The specification doesn't
define behavior if the reset is done while the clock is enabled.

From testing on the AST2500 and AST2400, the LPC Controller has problems
if the clock is reset while enabled.

Therefore, check whether the clock is enabled or not before performing
the reset and enable sequence in the ASPEED clock driver.

OpenBMC-Staging-Count: 1
Signed-off-by: Eddie James &lt;eajames@linux.vnet.ibm.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Handle inverse polarity of USB port 1 clock gate</title>
<updated>2018-02-20T05:33:56+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2018-01-12T05:48:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=5b9b4e598c677b3e5a7287097283c9e0f6373d79'/>
<id>urn:sha1:5b9b4e598c677b3e5a7287097283c9e0f6373d79</id>
<content type='text'>
The USB port 1 clock gate control has an inversed polarity
from all the other clock gates in the chip. This makes the
aspeed_clk_{enable,disable} functions honor the flag
CLK_GATE_SET_TO_DISABLE and set that flag appropriately
so it's set for all clocks except USB port 1.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
(cherry picked from commit 6671507f0fbd582b4003f837ab791d03ade8e0f4)
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: aspeed: Fix return value check in aspeed_cc_init()</title>
<updated>2018-02-20T05:33:56+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyongjun1@huawei.com</email>
</author>
<published>2018-01-05T01:41:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/talos-obmc-linux/commit/?id=76ab7c333c3d2eea9102bdc95e5fd62b2d59f310'/>
<id>urn:sha1:76ab7c333c3d2eea9102bdc95e5fd62b2d59f310</id>
<content type='text'>
In case of error, the function of_iomap() returns NULL pointer not
ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.

Fixes: a2e230c7b2ea ("clk: Add clock driver for ASPEED BMC SoCs")
Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
(cherry picked from commit accf475a5ece972af58c81e0742035ed90ad41d2)
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
</feed>
