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<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: src/usr/hwpf/hwp/chip_attributes.xml $                        -->
<!--                                                                        -->
<!-- IBM CONFIDENTIAL                                                       -->
<!--                                                                        -->
<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
<!--                                                                        -->
<!-- p1                                                                     -->
<!--                                                                        -->
<!-- Object Code Only (OCO) source materials                                -->
<!-- Licensed Internal Code Source Materials                                -->
<!-- IBM HostBoot Licensed Internal Code                                    -->
<!--                                                                        -->
<!-- The source code for this program is not published or otherwise         -->
<!-- divested of its trade secrets, irrespective of what has been           -->
<!-- deposited with the U.S. Copyright Office.                              -->
<!--                                                                        -->
<!-- Origin: 30                                                             -->
<!--                                                                        -->
<!-- IBM_PROLOG_END_TAG                                                     -->
<!-- $Id: chip_attributes.xml,v 1.11 2013/09/06 20:02:21 dcrowell Exp $ -->
<!--
    XML file specifying HWPF attributes.
    These are platInit attributes associated with chips.
-->

<attributes>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_ID</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
        ID of a chip target
        Read from the chip by the platform
    </description>
    <valueType>uint32</valueType>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_NAME</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
        Product name of a chip target
        Provided by the Machine Readable Workbook
    </description>
    <valueType>uint8</valueType>
    <enum>NONE = 0, VENICE = 1, MURANO = 2, CENTAUR = 3</enum>
    <platInit/>
    <!-- To make HWPs data driven, this is a privileged attribute that cannot
         be accessed by normal HWPs. -->
    <privileged/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_EC</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
        EC level of a chip target
        Read from the chip by the platform
    </description>
    <valueType>uint8</valueType>
    <platInit/>
    <!-- To make HWPs data driven, this is a privileged attribute that cannot
         be accessed by normal HWPs. -->
    <privileged/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_FSI_GP_REG_SCOM_ACCESS</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
        Indicates if the target's FSI GP regs have scom access
        Provided by the Machine Readable Workbook.
    </description>
    <valueType>uint8</valueType>
    <enum>false = 0, true = 1</enum>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_FABRIC_NODE_ID</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Logical fabric node the chip belongs to.
        Provided by the Machine Readable Workbook.
        Can vary across drawers.
    </description>
    <valueType>uint8</valueType>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_FABRIC_CHIP_ID</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Logical fabric chip id for this chip (position within the fabric).
        Provided by the Machine Readable Workbook.
        Can vary across drawers.
    </description>
    <valueType>uint8</valueType>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_HAS_SBE</id>
    <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP</targetType>
    <description>
        If true, the chip has an SBE and the associated registers
        Provided by the Machine Readable Workbook.
    </description>
    <valueType>uint8</valueType>
    <enum>false = 0, true = 1</enum>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_PROC_DCM_INSTALLED</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        If true, the chip is installed on a Dual Chip Module
        Provided by the Machine Readable Workbook
    </description>
    <valueType>uint8</valueType>
    <enum>false = 0, true = 1</enum>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_CHIP_REGIONS_TO_ENABLE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Called to get data to customize an IPL or SLW image with data indicating
        which chip regions the SBE should enable
      The data is in the format of the Module VPD PG (Partial Good Vector)
        keyword which is an 32 entry array of 16bit words, each word
        represents a chiplet and a defined set of bits within the word
        represents regions that are good. The 16 bit word is embedded within
        a 64bit word as described in the MVPD spec to reflect the clock
        controller region register layout:
          bits 0:3 are reserved -> set to 0
          bits 4:19 are the 16 bit data word
          bits 20:63 are reserved -> set to 0
      A platform needs to return data indicating the chip regions to enable,
      this may not be just the MVPD partial-good data, it may also not enable
      other chips and chiplets it has decided are non-functional - this is
      why it is not a standard MVPD query.
    </description>
    <valueType>uint64</valueType>
    <array>32</array>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_EX_L2_SINGLE_MEMBER_ENABLE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
      Vector to communicate to SBE which EX chiplets must be configured with L2 in single member mode.
      One bit per EX chiplet, bit location aligned to chiplet ID
      (bit 16: EX00, bit 17: EX01, bit 18: EX02 ... bit 31: EX15)
      EX chiplets whose L2 must run in single member mode are marked by a '1'.
    </description>
    <valueType>uint32</valueType>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_PROC_BOOT_VOLTAGE_VID</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Proc Boot Voltage
    </description>
    <valueType>uint32</valueType>
    <platInit/>
    <writeable/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_PROC_MASTER_TYPE</id>
    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
    <description>
        Returns a value indicating the master type of this chip:
        master, alt-master, or not master.
    </description>
    <valueType>uint8</valueType>
    <enum>
        ACTING_MASTER = 0x00,
        MASTER_CANDIDATE = 0x01,
        NOT_MASTER = 0x02
    </enum>
    <platInit/>
    <writeable/>
  </attribute>
  <!-- ********************************************************************* -->
</attributes>
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