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# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/pegasus/Proc_regs_TP.rule $
#
# IBM CONFIDENTIAL
#
# COPYRIGHT International Business Machines Corp. 2012,2014
#
# p1
#
# Object Code Only (OCO) source materials
# Licensed Internal Code Source Materials
# IBM HostBoot Licensed Internal Code
#
# The source code for this program is not published or otherwise
# divested of its trade secrets, irrespective of what has been
# deposited with the U.S. Copyright Office.
#
# Origin: 30
#
# IBM_PROLOG_END_TAG
############################################################################
# TP Chiplet Registers
############################################################################
register TP_CHIPLET_CS_FIR
{
name "EH.TPCHIP.TPC.XFIR";
scomaddr 0x01040000;
capture group default;
};
register TP_CHIPLET_RE_FIR
{
name "EH.TPCHIP.TPC.RFIR";
scomaddr 0x01040001;
capture group default;
};
register TP_CHIPLET_FIR_MASK
{
name "EH.TPCHIP.TPC.FIR_MASK";
scomaddr 0x01040002;
capture group default;
};
register TP_CHIPLET_SPA
{
name "EH.TPCHIP.TPC.EPS.FIR.SPATTN";
scomaddr 0x01040004;
capture group default;
};
register TP_CHIPLET_SPA_MASK
{
name "EH.TPCHIP.TPC.EPS.FIR.SPA_MASK";
scomaddr 0x01040007;
capture group default;
};
############################################################################
# TP Chiplet LFIR
############################################################################
register TP_LFIR
{
name "EH.TPCHIP.TPC.LOCAL_FIR";
scomaddr 0x0104000a;
reset (&, 0x0104000b);
mask (|, 0x0104000f);
capture group default;
};
register TP_LFIR_AND
{
name "EH.TPCHIP.TPC.LOCAL_FIR_AND";
scomaddr 0x0104000b;
capture group never;
access write_only;
};
register TP_LFIR_MASK
{
name "EH.TPCHIP.TPC.EPS.FIR.LOCAL_FIR_MASK";
scomaddr 0x0104000d;
capture group default;
};
register TP_LFIR_MASK_OR
{
name "EH.TPCHIP.TPC.EPS.FIR.LOCAL_FIR_MASK_OR";
scomaddr 0x0104000f;
capture group never;
access write_only;
};
register TP_LFIR_ACT0
{
name "EH.TPCHIP.TPC.EPS.FIR.LOCAL_FIR_ACTION0";
scomaddr 0x01040010;
capture type secondary;
capture group never;
capture req nonzero("TP_LFIR");
};
register TP_LFIR_ACT1
{
name "EH.TPCHIP.TPC.EPS.FIR.LOCAL_FIR_ACTION1";
scomaddr 0x01040011;
capture type secondary;
capture group never;
capture req nonzero("TP_LFIR");
};
############################################################################
# TP Chiplet OCCFIR
############################################################################
register OCCFIR
{
name "EH.TPCHIP.OCC.OCI.SCOM.OCC_SCOM_OCCLFIR";
scomaddr 0x01010800;
reset (&, 0x01010801);
mask (|, 0x01010805);
capture group default;
};
register OCCFIR_MASK
{
name "EH.TPCHIP.OCC.OCI.SCOM.OCC_SCOM_OCCLFIRMASK";
scomaddr 0x01010803;
capture group default;
};
register OCCFIR_ACT0
{
name "EH.TPCHIP.OCC.OCI.SCOM.OCC_SCOM_OCCLFIRACT0";
scomaddr 0x01010806;
capture type secondary;
capture group default;
capture req nonzero("OCCFIR");
};
register OCCFIR_ACT1
{
name "EH.TPCHIP.OCC.OCI.SCOM.OCC_SCOM_OCCLFIRACT1";
scomaddr 0x01010807;
capture type secondary;
capture group default;
capture req nonzero("OCCFIR");
};
register OCCFIR_ERROR_REPORT
{
name "EH.TPCHIP.OCC.OCI.SCOM.OCC_SCOM_OCCERRRPT";
scomaddr 0x0101080A;
capture group default;
capture group CerrRegs;
};
############################################################################
# TP Chiplet PBAMFIR
############################################################################
register PBAMFIR
{
name "EH.TPCHIP.PIB.LPCM.LPC.SYNC_FIR_REG";
scomaddr 0x01010c00;
reset (&, 0x01010c01);
mask (|, 0x01010c05);
capture group default;
};
register PBAMFIR_MASK
{
name "EH.TPCHIP.PIB.LPCM.LPC.SYNC_FIR_MASK_REG";
scomaddr 0x01010c03;
capture group default;
};
register PBAMFIR_ACT0
{
name "EH.TPCHIP.PIB.LPCM.LPC.SYNC_FIR_ACTION0_REG";
scomaddr 0x01010c06;
capture type secondary;
capture group default;
capture req nonzero("PBAMFIR");
};
register PBAMFIR_ACT1
{
name "EH.TPCHIP.PIB.LPCM.LPC.SYNC_FIR_ACTION1_REG";
scomaddr 0x01010c07;
capture type secondary;
capture group default;
capture req nonzero("PBAMFIR");
};
############################################################################
# TP Chiplet PMCFIR
############################################################################
register PMCFIR
{
name "EH.TPCHIP.OCC.PMC.PMC_LFIR_ERR_REG";
scomaddr 0x01010840;
reset (&, 0x01010841);
mask (|, 0x01010845);
capture group default;
};
register PMCFIR_MASK
{
name "EH.TPCHIP.OCC.PMC.PMC_LFIR_ERR_MASK_REG";
scomaddr 0x01010843;
capture group default;
};
register PMCFIR_ACT0
{
name "EH.TPCHIP.OCC.PMC.PMC_LFIR_ACTION0_REG";
scomaddr 0x01010846;
capture type secondary;
capture group default;
capture req nonzero("PMCFIR");
};
register PMCFIR_ACT1
{
name "EH.TPCHIP.OCC.PMC.PMC_LFIR_ACTION1_REG";
scomaddr 0x01010847;
capture type secondary;
capture group default;
capture req nonzero("PMCFIR");
};
################################################################################
# TOD Register
################################################################################
register TOD_MPCR
{
name "EH.TPCHIP.PIB.TOD.TOD_M_PATH_CTRL_REG";
scomaddr 0x00040000;
capture group TODReg;
};
register TOD_PCRP0
{
name "EH.TPCHIP.PIB.TOD.TOD_PRI_PORT_0_CTRL_REG";
scomaddr 0x00040001;
capture group TODReg;
};
register TOD_PCRP1
{
name "EH.TPCHIP.PIB.TOD.TOD_PRI_PORT_1_CTRL_REG";
scomaddr 0x00040002;
capture group TODReg;
};
register TOD_SCRP0
{
name "EH.TPCHIP.PIB.TOD.TOD_SEC_PORT_0_CTRL_REG";
scomaddr 0x00040003;
capture group TODReg;
};
register TOD_SCRP1
{
name "EH.TPCHIP.PIB.TOD.TOD_SEC_PORT_1_CTRL_REG";
scomaddr 0x00040004;
capture group TODReg;
};
register TOD_SPCR
{
name "EH.TPCHIP.PIB.TOD.TOD_S_PATH_CTRL_REG";
scomaddr 0x00040005;
capture group TODReg;
};
register TOD_IPCR
{
name "EH.TPCHIP.PIB.TOD.TOD_I_PATH_CTRL_REG";
scomaddr 0x00040006;
capture group TODReg;
};
register TOD_PSMSCR
{
name "EH.TPCHIP.PIB.TOD.TOD_PSS_MSS_CTRL_REG";
scomaddr 0x00040007;
capture group TODReg;
};
register TOD_STATUSREGISTER
{
name "EH.TPCHIP.PIB.TOD.TOD_PSS_MSS_STATUS_REG";
scomaddr 0x00040008;
capture group TODReg;
};
register TOD_MPSR
{
name "EH.TPCHIP.PIB.TOD.TOD_M_PATH_STATUS_REG";
scomaddr 0x00040009;
capture group TODReg;
};
register TOD_SPSR
{
name "EH.TPCHIP.PIB.TOD.TOD_S_PATH_STATUS_REG";
scomaddr 0x0004000A;
capture group TODReg;
};
register TOD_CCR
{
name "EH.TPCHIP.PIB.TOD.TOD_CHIP_CTRL_REG";
scomaddr 0x00040010;
capture group TODReg;
};
register TOD_TRACEDATA_SET_1
{
name "EH.TPCHIP.PIB.TOD.TOD_TRACE_DATA_1_REG";
scomaddr 0x0004001D;
capture group TODReg;
};
register TOD_TRACEDATA_SET_2
{
name "EH.TPCHIP.PIB.TOD.TOD_TRACE_DATA_2_REG";
scomaddr 0x0004001E;
capture group TODReg;
};
register TOD_TRACEDATA_SET_3
{
name "EH.TPCHIP.PIB.TOD.TOD_TRACE_DATA_3_REG";
scomaddr 0x0004001F;
capture group TODReg;
};
register TOD_FSM
{
name "EH.TPCHIP.PIB.TOD.TOD_FSM_REG";
scomaddr 0x00040024;
capture group TODReg;
};
register TOD_TX_TTYPE
{
name "EH.TPCHIP.PIB.TOD.TOD_TX_TTYPE_CTRL_REG";
scomaddr 0x00040027;
capture group TODReg;
};
register TOD_RX_TTYPE
{
name "EH.TPCHIP.PIB.TOD.TOD_RX_TTYPE_CTRL_REG";
scomaddr 0x00040029;
capture group TODReg;
};
register TOD_ERRORREGISTER
{
name "EH.TPCHIP.PIB.TOD.TOD_ERROR_REG";
scomaddr 0x00040030;
capture group TODReg;
reset (^, 0x40030);
};
register TOD_ERRORMASK
{
name "EH.TPCHIP.PIB.TOD.TOD_ERROR_MASK_REG";
scomaddr 0x40032;
capture group TODReg;
};
register TOD_ERRORACTION
{
name "EH.TPCHIP.PIB.TOD.TOD_ERROR_ROUTING_REG";
scomaddr 0x00040033;
capture group TODReg;
};
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