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#include <sys/syscall.h>
#include <sys/mmio.h>
#include <assert.h>
#include <kernel/task.H>
#include <kernel/cpu.H>
#include <kernel/cpuid.H>
using namespace Systemcalls;
void* mmio_map(void* ra, size_t pages)
{
return _syscall2(MMIO_MAP, ra, (void*)pages);
}
int mmio_unmap(void* ea, size_t pages)
{
return (int64_t) _syscall2(MMIO_UNMAP, ea, (void*)pages);
}
void* mmio_dev_map(void *ra, SEG_DATA_SIZES i_devDataSize)
{
return _syscall2(DEV_MAP, ra, (void*)i_devDataSize);
}
int mmio_dev_unmap(void *ea)
{
return (int64_t) _syscall1(DEV_UNMAP, ea);
}
uint64_t mmio_hmer_read()
{
return (uint64_t) _syscall0(MMIO_HMER_READ);
}
void mmio_hmer_write(uint64_t value)
{
_syscall1(MMIO_HMER_WRITE, (void*)value);
}
/** @brief Determine the base register address of the mmio_scratch_base.
*
* Since this code is called from within the kernel as part of static
* construction of g_mmio_scratch_base, we can use internal kernel
* functions here (and not system calls) to determine the CPU type.
*
* @return Base address (SPRC value) of the scratch registers.
*/
static uint64_t mmio_scratch_base()
{
ProcessorCoreType cpuType = CpuID::getCpuType();
switch (cpuType)
{
case CORE_POWER7:
case CORE_POWER7_PLUS:
return 0x20;
case CORE_POWER8_SALERNO:
case CORE_POWER8_VENICE:
case CORE_UNKNOWN:
default:
return 0x40;
}
}
/** Global cache of the scratch register SPRC base address. */
uint64_t g_mmio_scratch_base = mmio_scratch_base();
uint64_t mmio_scratch_read(uint64_t which)
{
return (uint64_t) _syscall1(MMIO_SCRATCH_READ,
(void*)(which + g_mmio_scratch_base));
}
void mmio_scratch_write(uint64_t which, uint64_t value)
{
_syscall2(MMIO_SCRATCH_WRITE,
(void*)(which + g_mmio_scratch_base), (void*)value);
}
mutex_t * mmio_xscom_mutex()
{
// Get task structure.
register task_t* task;
asm volatile("mr %0, 13" : "=r"(task));
// Ensure task is pinned.
crit_assert(task->affinity_pinned);
// Return mutex from cpu structure.
return &task->cpu->xscom_mutex;
}
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