blob: 142917df23e309bc01a7078dc385f102bd74a92c (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
|
// IBM_PROLOG_BEGIN_TAG
// This is an automatically generated prolog.
//
// $Source: src/include/usr/intr/interrupt.H $
//
// IBM CONFIDENTIAL
//
// COPYRIGHT International Business Machines Corp. 2011
//
// p1
//
// Object Code Only (OCO) source materials
// Licensed Internal Code Source Materials
// IBM HostBoot Licensed Internal Code
//
// The source code for this program is not published or other-
// wise divested of its trade secrets, irrespective of what has
// been deposited with the U.S. Copyright Office.
//
// Origin: 30
//
// IBM_PROLOG_END
#ifndef INTERRUPT_H
#define INTERRUPT_H
#include <sys/msg.h>
#include <errl/errltypes.H>
#include <sys/interrupt.h>
namespace INTR
{
/**
* External Interrupt Types (XISR)
*/
enum ext_intr_t
{
NO_INTERRUPT = 0, //!< no interrupt present
INTERPROC = 2, //!< Inter processor interrupt
FSP_MAILBOX = 0x25, //!< TODO find this value
ATTENTION = 0x26, //!< TODO find this value
};
/**
* Msg types for intrRp from usr space
*/
enum msg_intr_types_t
{
MSG_INTR_ADD_CPU_USR = 1, //!< Add cpu core, data[0] = cpuid (PIR)
MSG_INTR_REGISTER_MSGQ, //!< Register a msgQ
MSG_INTR_ENABLE, //!< Enable external Interrupts
MSG_INTR_DISABLE, //!< Disable external interrupts
};
/**
* Register a message queue to recieve external interrupts
* @param[in] i_msgQ The message queue
* @param[in] i_type The type of interrupt (XISR value)
* @return errlHndl_t on error.
*/
errlHndl_t registerMsgQ(msg_q_t i_msgQ, ext_intr_t i_type);
/**
* Enable hardware to report external interrupts
* @return errlHndl_t on error.
*/
errlHndl_t enableExternalInterrupts();
/**
* Disable hardware from reporting external interrupts
* @return errlHndl_t on error.
*/
errlHndl_t disableExternalInterrupts();
};
#endif
|