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<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml $ -->
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
<!-- Contributors Listed Below - COPYRIGHT 2018 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
<!-- you may not use this file except in compliance with the License. -->
<!-- You may obtain a copy of the License at -->
<!-- -->
<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
<!-- -->
<!-- Unless required by applicable law or agreed to in writing, software -->
<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
<!-- implied. See the License for the specific language governing -->
<!-- permissions and limitations under the License. -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<attributes>
<attribute>
<id>ATTR_MEM_MRW_IS_PLANAR</id>
<targetType>TARGET_TYPE_OCMB_CHIP</targetType>
<description>
Indicates if the DIMM connected to this controller
are in a planar configuration
</description>
<valueType>uint8</valueType>
<enum>FALSE = 0x00, TRUE = 0x01</enum>
<platInit/>
<default>FALSE</default>
<initToZero/>
<mssAccessorName>mem_mrw_is_planar</mssAccessorName>
</attribute>
<attribute>
<id>ATTR_MSS_MRW_POWER_CONTROL_REQUESTED</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
Memory power control settings programmed during IPL
Used by OCC when exiting idle power-save mode
</description>
<valueType>uint8</valueType>
<enum>OFF = 0x00, POWER_DOWN = 0x01, PD_AND_STR = 0x02, PD_AND_STR_CLK_STOP = 0x03</enum>
<platInit/>
<default>OFF</default>
<initToZero/>
<mssAccessorName>mrw_power_control_requested</mssAccessorName>
</attribute>
</attributes>
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