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<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml $ -->
<!--                                                                        -->
<!-- OpenPOWER HostBoot Project                                             -->
<!--                                                                        -->
<!-- Contributors Listed Below - COPYRIGHT 2015,2019                        -->
<!-- [+] International Business Machines Corp.                              -->
<!--                                                                        -->
<!--                                                                        -->
<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
<!-- you may not use this file except in compliance with the License.       -->
<!-- You may obtain a copy of the License at                                -->
<!--                                                                        -->
<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
<!--                                                                        -->
<!-- Unless required by applicable law or agreed to in writing, software    -->
<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
<!-- implied. See the License for the specific language governing           -->
<!-- permissions and limitations under the License.                         -->
<!--                                                                        -->
<!-- IBM_PROLOG_END_TAG                                                     -->

<!-- -->
<!-- @file memory_mss_lib.xml -->
<!-- @brief Error xml for MSS library routines -->
<!-- -->
<!-- *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com> -->
<!-- *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> -->
<!-- *HWP Team: Memory -->
<!-- *HWP Level: 3 -->
<!-- *HWP Consumed by: HB:FSP -->
<!-- -->



<hwpErrors>

  <registerFfdc>
    <id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP3_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP3_P0</scomRegister>

    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP3_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP3_P0</scomRegister>

    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP3_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP3_P0</scomRegister>

    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP3_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP0_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP1_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP2_P0</scomRegister>
    <scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP3_P0</scomRegister>
  </registerFfdc>

  <registerFfdc>
    <id>REG_FFDC_MSS_CCS_FAILURE</id>
    <scomRegister>MCBIST_CCS_MODEQ</scomRegister>
    <scomRegister>MCBIST_CCS_STATQ</scomRegister>
    <scomRegister>MCBIST_CCS_CNTLQ</scomRegister>
    <scomRegister>MCBIST_MCBMCATQ</scomRegister>

    <!-- Instructions -->
    <scomRegister>MCBIST_CCS_INST_ARR0_00</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_01</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_02</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_03</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_04</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_05</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_06</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_07</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_08</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_09</scomRegister>

    <scomRegister>MCBIST_CCS_INST_ARR0_10</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_11</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_12</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_13</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_14</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_15</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_16</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_17</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_18</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_19</scomRegister>

    <scomRegister>MCBIST_CCS_INST_ARR0_20</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_21</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_22</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_23</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_24</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_25</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_26</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_27</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_28</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_29</scomRegister>

    <scomRegister>MCBIST_CCS_INST_ARR0_30</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR0_31</scomRegister>

    <!-- Control array -->
    <scomRegister>MCBIST_CCS_INST_ARR1_00</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_01</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_02</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_03</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_04</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_05</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_06</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_07</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_08</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_09</scomRegister>

    <scomRegister>MCBIST_CCS_INST_ARR1_10</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_11</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_12</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_13</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_14</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_15</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_16</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_17</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_18</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_19</scomRegister>

    <scomRegister>MCBIST_CCS_INST_ARR1_20</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_21</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_22</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_23</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_24</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_25</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_26</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_27</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_28</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_29</scomRegister>

    <scomRegister>MCBIST_CCS_INST_ARR1_30</scomRegister>
    <scomRegister>MCBIST_CCS_INST_ARR1_31</scomRegister>

    <!-- to get the CCS state machine hung state -->
    <scomRegister>MCBIST_MBA_MCBERRPTQ</scomRegister>
  </registerFfdc>

  <hwpError>
    <rc>RC_MSS_NIMBUS_CCS_READ_MISCOMPARE</rc>
    <description>
        CCS reports a read miscompare.
    </description>
    <ffdc>FAIL_TYPE</ffdc>
    <collectRegisterFfdc>
      <id>REG_FFDC_MSS_CCS_FAILURE</id>
      <target>MCBIST_TARGET</target>
      <targetType>TARGET_TYPE_MCBIST</targetType>
    </collectRegisterFfdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
    <deconfigure>
      <target>MCA_TARGET</target>
    </deconfigure>
    <gard>
        <target>MCA_TARGET</target>
    </gard>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_NIMBUS_CCS_UE_SUE</rc>
    <description>
        CCS reports a UE or SUE in the CCS program array
        Chould be an indicator of corruption in the CCS program
    </description>
    <ffdc>FAIL_TYPE</ffdc>
    <collectRegisterFfdc>
      <id>REG_FFDC_MSS_CCS_FAILURE</id>
      <target>MCBIST_TARGET</target>
      <targetType>TARGET_TYPE_MCBIST</targetType>
    </collectRegisterFfdc>
    <callout>
      <target>MCBIST_TARGET</target>
      <priority>HIGH</priority>
    </callout>
    <deconfigure>
      <target>MCBIST_TARGET</target>
    </deconfigure>
    <gard>
        <target>MCBIST_TARGET</target>
    </gard>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_NIMBUS_CCS_CAL_TIMEOUT</rc>
    <description>
        CCS reports never getting a response back from the PHY on a calibration command
    </description>
    <ffdc>FAIL_TYPE</ffdc>
    <collectRegisterFfdc>
      <id>REG_FFDC_MSS_CCS_FAILURE</id>
      <target>MCBIST_TARGET</target>
      <targetType>TARGET_TYPE_MCBIST</targetType>
    </collectRegisterFfdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
    <deconfigure>
      <target>MCA_TARGET</target>
    </deconfigure>
    <gard>
        <target>MCA_TARGET</target>
    </gard>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_NIMBUS_CCS_HUNG</rc>
    <description>
        Software reported that the machine is not seeing the CCS finish in the alloted time
    </description>
    <collectRegisterFfdc>
      <id>REG_FFDC_MSS_CCS_FAILURE</id>
      <target>MCBIST_TARGET</target>
      <targetType>TARGET_TYPE_MCBIST</targetType>
    </collectRegisterFfdc>
   <callout>
      <target>MCBIST_TARGET</target>
      <priority>HIGH</priority>
    </callout>
    <deconfigure>
      <target>MCBIST_TARGET</target>
    </deconfigure>
    <gard>
        <target>MCBIST_TARGET</target>
    </gard>
    <callout>
        <procedure>CODE</procedure>
        <priority>MEDIUM</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_CCS_HUNG_TRYING_TO_STOP</rc>
    <description>
        CCS failed to return from in-progress status while trying to stop a previous program
        Software reported that CCS did not finish in alloted time after manually triggering stop
    </description>
    <collectRegisterFfdc>
      <id>REG_FFDC_MSS_CCS_FAILURE</id>
      <target>MCBIST_TARGET</target>
      <targetType>TARGET_TYPE_MCBIST</targetType>
    </collectRegisterFfdc>
    <callout>
      <target>MCBIST_TARGET</target>
      <priority>HIGH</priority>
    </callout>
    <deconfigure>
      <target>MCBIST_TARGET</target>
    </deconfigure>
    <gard>
        <target>MCBIST_TARGET</target>
    </gard>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_APB_INVALID_ADDRESS</rc>
    <description>PHY APB interface is reporting an invalid address was read or written</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_APB_WR_PAR_ERR</rc>
    <description>PHY APB interface is reporting a read/write parity error</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_FATAL_FSM_PHYTOP</rc>
    <description>Indicates a non-recoverable FSM state checker error in PHYTOP logic</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_FATAL_PARITY_PHYTOP</rc>
    <description>Indicates a non-recoverable parity error in PHYTOP logic</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_FSM_PHYTOP</rc>
    <description>Indicates a recoverable FSM state checker error in PHYTOP logic</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_PARITY_PHYTOP</rc>
    <description>Indicates a recoverable register parity error in PHYTOP logic</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_FATAL_ADR52_MASTER</rc>
    <description>Indicates a non-recoverable register parity error in ADR52 master side logic</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_FATAL_ADR52_SLAVE</rc>
    <description>Indicates a non-recoverable register parity error in ADR52 slave side logic</description>
    <ffdc>PORT_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_FSM_DP16</rc>
    <description>Indicates a recoverable FSM state checker error in a DP16</description>
    <ffdc>PORT_POSITION</ffdc>
    <ffdc>DP16_POSITION</ffdc>
    <callout>
      <target>MCA_TARGET</target>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_NO_XLATE_FOR_DIMM</rc>
    <description>Indicates there wasn't an address translation defined for the DIMM</description>
    <ffdc>MASTER_RANKS</ffdc>
    <ffdc>TOTAL_RANKS</ffdc>
    <ffdc>DRAM_DENSITY</ffdc>
    <ffdc>DRAM_WIDTH</ffdc>
    <ffdc>DRAM_GENERATION</ffdc>
    <ffdc>DIMM_TYPE</ffdc>
    <ffdc>ROWS</ffdc>
    <ffdc>SIZE</ffdc>
    <ffdc>DIMM_IN_ERROR</ffdc>
    <callout>
      <procedure>MEMORY_PLUGGING_ERROR</procedure>
      <priority>MEDIUM</priority>
    </callout>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_BAD_DIMM_INDEX_FOR_GIVEN_RANK</rc>
    <description>Indicates a fail when attempting to get a DIMM index for a given rank</description>
    <ffdc>RANK</ffdc>
    <ffdc>DIMM_INDEX</ffdc>
    <ffdc>MCA_TARGET</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_NO_DIMM_FOR_GIVEN_DIMM_INDEX</rc>
    <description>Indicates a fail when attempting to get a DIMM target for a given DIMM index</description>
    <ffdc>RANK</ffdc>
    <ffdc>DIMM_INDEX</ffdc>
    <ffdc>MCA_TARGET</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_C4_PIN_OUT_OF_RANGE</rc>
    <description>Indicates a fail when attempting to get a PHY mapping for an out-of-bounds module C4 pin index</description>
    <ffdc>MCA_TARGET</ffdc>
    <ffdc>TYPE</ffdc>
    <ffdc>INDEX</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_NO_C4_PIN_MAPPING</rc>
    <description>Indicates a fail when attempting to get a module C4 pin mapping for a given PHY instance and lane</description>
    <ffdc>MCA_TARGET</ffdc>
    <ffdc>TYPE</ffdc>
    <ffdc>DP</ffdc>
    <ffdc>LANE</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_MC_PIN_OUT_OF_RANGE</rc>
    <description>Indicates a fail when attempting to get a PHY mapping for an out-of-bounds module MC pin index</description>
    <ffdc>MCA_TARGET</ffdc>
    <ffdc>INDEX</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_NO_MC_PIN_MAPPING</rc>
    <description>Indicates a fail when attempting to get a module MC pin mapping for a given PHY instance and lane</description>
    <ffdc>MCA_TARGET</ffdc>
    <ffdc>DP</ffdc>
    <ffdc>LANE</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_EMPTY_PDA_VECTOR</rc>
    <description>Indicates a that a vector was empty when a procedure was called</description>
    <ffdc>PROCEDURE</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_PDA_DRAM_OUT_OF_RANGE</rc>
    <description>Indicates a DRAM passed to the PDA code is out of range</description>
    <ffdc>MCA_TARGET</ffdc>
    <ffdc>DRAM</ffdc>
    <ffdc>MAX_DRAM</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_SRE_MCA_OUT_OF_RANGE</rc>
    <description>Indicates a MCA passed to the NVDIMM sre code is out of range</description>
    <ffdc>PROC_TARGET</ffdc>
    <ffdc>MCA_POS</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_RESETN_MCA_OUT_OF_RANGE</rc>
    <description>Indicates a MCA passed to the NVDIMM resetn code is out of range</description>
    <ffdc>PROC_TARGET</ffdc>
    <ffdc>MCA_POS</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>

  <hwpError>
    <rc>RC_MSS_STR_NOT_ENTERED</rc>
    <description>Indicates a MCA has not entered STR within the allotted time</description>
    <ffdc>PROC_TARGET</ffdc>
    <ffdc>MCA_POS</ffdc>
    <ffdc>MCA_FARB6Q</ffdc>
    <ffdc>STR_STATE</ffdc>
    <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
    </callout>
  </hwpError>
</hwpErrors>
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