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<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml $ -->
<!--                                                                        -->
<!-- IBM CONFIDENTIAL                                                       -->
<!--                                                                        -->
<!-- EKB Project                                                            -->
<!--                                                                        -->
<!-- COPYRIGHT 2016                                                         -->
<!-- [+] International Business Machines Corp.                              -->
<!--                                                                        -->
<!--                                                                        -->
<!-- The source code for this program is not published or otherwise         -->
<!-- divested of its trade secrets, irrespective of what has been           -->
<!-- deposited with the U.S. Copyright Office.                              -->
<!--                                                                        -->
<!-- IBM_PROLOG_END_TAG                                                     -->

<attributes>

    <attribute>
        <id>ATTR_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_port
        </description>
        <valueType>uint32</valueType>
        <platInit/>
        <odmVisable/>
        <persistRuntime/>
        <mssAccessorName>mrw_safemode_mem_throttled_n_commands_per_port</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_SLOT</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_slot
        </description>
        <valueType>uint32</valueType>
        <platInit/>
        <odmVisable/>
        <persistRuntime/>
        <mssAccessorName>mrw_safemode_mem_throttled_n_commands_per_slot</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>Machine Readable Workbook Thermal Memory Power Limit</description>
        <valueType>uint32</valueType>
        <platInit/>
        <odmVisable/>
        <mssAccessorName>mrw_thermal_memory_power_limit</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Machine Readable Workbook DIMM power curve percent uplift
          for this system at max utilization.
        </description>
        <valueType>uint8</valueType>
        <platInit/>
        <odmVisable/>
        <persistRuntime/>
        <mssAccessorName>mrw_dimm_power_curve_percent_uplift</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Machine Readable Workbook DIMM power curve percent uplift
          for this system at idle utilization.
        </description>
        <valueType>uint8</valueType>
        <platInit/>
        <odmVisable/>
        <persistRuntime/>
        <mssAccessorName>mrw_dimm_power_curve_percent_uplift_idle</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_MEM_M_DRAM_CLOCKS</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Machine Readable Workbook for the number of M DRAM clocks.
          One approach to curbing DRAM power usage is by throttling
          traffic through a programmable N commands over M window.
        </description>
        <valueType>uint32</valueType>
        <platInit/>
        <odmVisable/>
        <persistRuntime/>
        <mssAccessorName>mrw_mem_m_dram_clocks</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_MAX_DRAM_DATABUS_UTIL</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
            Machine Readable Workbook value for maximum dram data bus utilization in centi percent (c%).
            Used to determine memory throttle values.
        </description>
        <valueType>uint32</valueType>
        <platInit/>
        <odmVisable/>
        <persistRuntime/>
        <mssAccessorName>mrw_max_dram_databus_util</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
            Option to control MCS prefetch retry threshold, for performance optimization.
            This attribute controls the number of retries in the prefetch engine.
            Retry threshold available ranges from 16 to 30.
            Note: Values outside those ranges will default to 30.
            In MRW.
        </description>
        <valueType>uint8</valueType>
        <platInit/>
        <writeable/>
        <odmVisable/>
        <odmChangeable/>
        <mssAccessorName>mrw_mcs_prefetch_retry_threshold</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_POWER_CONTROL_REQUESTED</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>Capable power control settings. In MRW.</description>
        <valueType>uint8</valueType>
        <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum>
        <platInit/>
        <odmVisable/>
        <mssAccessorName>mrw_power_control_requested</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Machine Readable Workbook enablement of the HWP code to adjust the
          VMEM regulator power limit based on number of installed DIMMs.
        </description>
        <valueType>uint8</valueType>
        <enum>FALSE = 0, TRUE = 1</enum>
        <platInit/>
        <odmVisable/>
        <mssAccessorName>mrw_vmem_regulator_power_limit_per_dimm_adj_enable</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Machine Readable Workbook value for the maximum possible number
          of dimms that can be installed under any of the VMEM regulators.
        </description>
        <valueType>uint8</valueType>
        <platInit/>
        <odmVisable/>
        <mssAccessorName>mrw_max_number_dimms_possible_per_vmem_regulator</mssAccessorName>
    </attribute>


    <attribute>
        <id>ATTR_MRW_AVDD_OFFSET_DISABLE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>Used for to determine whether to apply an offset to AVDD. Supplied by MRW.</description>
        <valueType>uint8</valueType>
        <enum>DISABLE = 1, ENABLE = 0</enum>
        <platInit/>
        <mssAccessorName>mrw_avdd_offset_disable</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_VDD_OFFSET_DISABLE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>Used for to determine whether to apply an offset to VDD. Supplied by MRW.</description>
        <valueType>uint8</valueType>
        <enum>DISABLE = 1, ENABLE = 0</enum>
        <platInit/>
        <mssAccessorName>mrw_vdd_offset_disable</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_VCS_OFFSET_DISABLE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description>
        <valueType>uint8</valueType>
        <enum>DISABLE = 1, ENABLE = 0</enum>
        <platInit/>
        <mssAccessorName>mrw_vcs_offset_disable</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_VPP_OFFSET_DISABLE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description>
        <valueType>uint8</valueType>
        <enum>DISABLE = 1, ENABLE = 0</enum>
        <platInit/>
        <mssAccessorName>mrw_vpp_offset_disable</mssAccessorName>
    </attribute>

    <attribute>
        <id>ATTR_MRW_VDDR_OFFSET_DISABLE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>Used for to determine whether to apply an offset to VDDR. Supplied by MRW.</description>
        <valueType>uint8</valueType>
        <enum>DISABLE = 1, ENABLE = 0</enum>
        <platInit/>
        <mssAccessorName>mrw_vddr_offset_disable</mssAccessorName>
    </attribute>

    <attribute>
      <id>ATTR_MRW_FINE_REFRESH_MODE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Fine refresh mode.
          Should be defaulted to normal mode.
          This is for DDR4 MRS3.
        </description>
        <valueType>uint8</valueType>
        <enum>
          NORMAL = 0,
          FIXED_2X = 1,
          FIXED_4X = 2,
          FLY_2X = 5,
          FLY_4X = 6
        </enum>
        <platInit/>
        <mssAccessorName>mrw_fine_refresh_mode</mssAccessorName>
    </attribute>


    <attribute>
        <id>ATTR_MRW_TEMP_REF_RANGE</id>
        <targetType>TARGET_TYPE_SYSTEM</targetType>
        <description>
          Temp ref range.
          Should be defaulted to extended range.
          This is for DDR4 MRS4.
        </description>
        <valueType>uint8</valueType>
        <enum>NORMAL = 0, EXTEND = 1</enum>
        <writeable/>
        <mssAccessorName>mrw_temp_ref_range</mssAccessorName>
    </attribute>

</attributes>
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