base CLASS TYPE MODEL HUID PHYS_PATH AFFINITY_PATH PRIMARY_CAPABILITIES HWAS_STATE DECONFIG_GARDABLE 0 sys-sys-power8 base CLASSSYS TYPESYS MODELPOWER8 HUID0x00010000 SCRATCH_UINT8_1 SCRATCH_UINT8_2 SCRATCH_UINT32_1 SCRATCH_UINT32_2 SCRATCH_UINT64_1 SCRATCH_UINT64_2 SCRATCH_UINT8_ARRAY_1 SCRATCH_UINT8_ARRAY_2 SCRATCH_UINT32_ARRAY_1 SCRATCH_UINT32_ARRAY_2 SCRATCH_UINT64_ARRAY_1 SCRATCH_UINT64_ARRAY_2 NUMERIC_POD_TYPE_TEST HB_MUTEX_TEST_LOCK DUMMY_RW XSCOM_BASE_ADDRESS TEST_NULL_STRING TEST_MIN_STRINGZ TEST_MAX_STRING TEST_NO_DEFAULT_STRING PHYS_PATH physical:sys-0 AFFINITY_PATH affinity:sys-0 IS_SIMULATION 0 ISTEP_MODE PROC_EPS_TABLE_TYPE PROC_FABRIC_PUMP_MODE PROC_X_BUS_WIDTH ALL_MCS_IN_INTERLEAVING_GROUP FREQ_PROC_REFCLOCK FREQ_MEM_REFCLOCK FREQ_CORE_FLOOR FREQ_PB FREQ_A FREQ_X chip base CLASS CHIP POSITION FSI_MASTER_CHIP physical:na-0 FSI_MASTER_TYPE FSI_MASTER_PORT FSI_SLAVE_CASCADE FSI_OPTION_FLAGS DECONFIG_GARDABLE 1 EC CHIP_ID chip-processor chip TYPE PROC PRIMARY_CAPABILITIES supportsFsiScom1 supportsXscom1 supportsInbandScom0 reserved0 SCOM_SWITCHES FSI_MASTER_MUTEX FSI_SCOM_MUTEX SCOM_IND_MUTEX FSI_GP_REG_SCOM_ACCESS 1 FABRIC_NODE_ID FABRIC_CHIP_ID CHIP_HAS_SBE 1 MVPD_FREQ_CORE_NOMINAL chip-processor-power8 chip-processor XSCOM_CHIP_INFO DUMMY_RW DUMMY_HEAP_ZERO_DEFAULT I2C_ENGINE_MUTEX_0 0 I2C_ENGINE_MUTEX_1 0 I2C_ENGINE_MUTEX_2 0 chip-processor-salerno chip-processor-power8 MODEL SALERNO EEPROM_ADDR_INFO0 EEPROM_ADDR_INFO1 chip-processor-venice chip-processor-power8 MODEL VENICE DUMMY_RW DUMMY_HEAP_ZERO_DEFAULT EEPROM_ADDR_INFO0 EEPROM_ADDR_INFO1 chip-processor-murano chip-processor-power8 MODEL MURANO unit base CLASS UNIT PRIMARY_CAPABILITIES supportsFsiScom1 supportsXscom1 supportsInbandScom0 reserved0 DECONFIG_GARDABLE 1 CHIP_UNIT 0 unit-ex-power8 unit TYPE EX L2_R_T0_EPS L2_R_T1_EPS L2_R_T2_EPS L2_FORCE_R_T2_EPS L2_W_EPS L3_R_T0_EPS L3_R_T1_EPS L3_R_T2_EPS L3_FORCE_R_T2_EPS L3_W_EPS unit-ex-salerno unit-ex-power8 MODEL SALERNO unit-ex-venice unit-ex-power8 MODEL VENICE unit-ex-murano unit-ex-power8 MODEL MURANO unit-core-power8 unit TYPE CORE unit-core-salerno unit-core-power8 MODEL SALERNO unit-core-venice unit-core-power8 MODEL VENICE unit-core-murano unit-core-power8 MODEL MURANO unit-pervasive-power8 unit TYPE PERVASIVE unit-pervasive-salerno unit-pervasive-power8 MODEL SALERNO unit-pervasive-venice unit-pervasive-power8 MODEL VENICE unit-pervasive-murano unit-pervasive-power8 MODEL MURANO unit-pci-power8 unit TYPE PCI unit-pci-salerno unit-pci-power8 MODEL SALERNO unit-pci-venice unit-pci-power8 MODEL VENICE unit-pci-murano unit-pci-power8 MODEL MURANO unit-powerbus-power8 unit TYPE POWERBUS unit-powerbus-salerno unit-powerbus-power8 MODEL SALERNO unit-powerbus-venice unit-powerbus-power8 MODEL VENICE unit-powerbus-murano unit-powerbus-power8 MODEL MURANO enc-node-power8 base CLASS ENC TYPE NODE MODEL POWER8 unit-abus-power8 unit TYPE ABUS CHIP_UNIT unit-abus-salerno unit-abus-power8 MODEL SALERNO unit-abus-venice unit-abus-power8 MODEL VENICE unit-abus-murano unit-abus-power8 MODEL MURANO unit-xbus-power8 unit TYPE XBUS CHIP_UNIT unit-xbus-salerno unit-xbus-power8 MODEL SALERNO unit-xbus-venice unit-xbus-power8 MODEL VENICE unit-xbus-murano unit-xbus-power8 MODEL MURANO unit-memport-power8 unit TYPE MEM_PORT unit-mbs-power8 unit TYPE MBS unit-mba-power8 unit TYPE MBA MSS_DIMM_MFG_ID_CODE EFF_DIMM_RANKS_CONFIGED EFF_NUM_RANKS_PER_DIMM EFF_DIMM_TYPE EFF_DRAM_WIDTH EFF_DRAM_GEN EFF_PRIMARY_RANK_GROUP0 EFF_PRIMARY_RANK_GROUP1 EFF_PRIMARY_RANK_GROUP2 EFF_PRIMARY_RANK_GROUP3 EFF_SECONDARY_RANK_GROUP0 EFF_SECONDARY_RANK_GROUP1 EFF_SECONDARY_RANK_GROUP2 EFF_SECONDARY_RANK_GROUP3 EFF_TERTIARY_RANK_GROUP0 EFF_TERTIARY_RANK_GROUP1 EFF_TERTIARY_RANK_GROUP2 EFF_TERTIARY_RANK_GROUP3 EFF_QUATERNARY_RANK_GROUP0 EFF_QUATERNARY_RANK_GROUP1 EFF_QUATERNARY_RANK_GROUP2 EFF_QUATERNARY_RANK_GROUP3 EFF_ODT_RD EFF_ODT_WR EFF_DRAM_RON EFF_DRAM_RTT_NOM EFF_DRAM_RTT_WR EFF_DRAM_WR_VREF EFF_CEN_DRV_IMP_DQ_DQS EFF_CEN_DRV_IMP_CMD EFF_CEN_DRV_IMP_CNTL EFF_CEN_RCV_IMP_DQ_DQS EFF_CEN_SLEW_RATE_DQ_DQS EFF_CEN_SLEW_RATE_CMD EFF_CEN_SLEW_RATE_CNTL EFF_CEN_RD_VREF EFF_DIMM_SIZE EFF_DRAM_DENSITY EFF_DRAM_TRCD EFF_DRAM_TRRD EFF_DRAM_TRP EFF_DRAM_TRAS EFF_DRAM_TRC EFF_DRAM_TRFI EFF_DRAM_TRFC EFF_DRAM_TWTR EFF_DRAM_TRTP EFF_DRAM_TFAW EFF_DRAM_BL EFF_DRAM_CL EFF_DRAM_AL EFF_DRAM_CWL EFF_DRAM_RBT EFF_DRAM_TM EFF_DRAM_DLL_RESET EFF_DRAM_WR EFF_DRAM_DLL_PPD EFF_DRAM_DLL_ENABLE EFF_DRAM_TDQS EFF_DRAM_WR_LVL_ENABLE EFF_DRAM_OUTPUT_BUFFER EFF_DRAM_PASR EFF_DRAM_ASR EFF_DRAM_SRT EFF_MPR_LOC EFF_MPR_MODE EFF_DIMM_RCD_CNTL_WORD_0_15 EFF_SCHMOO_MODE EFF_SCHMOO_TEST_VALID EFF_SCHMOO_PARAM_VALID EFF_MEMCAL_INTERVAL EFF_ZQCAL_INTERVAL MSS_THROTTLE_NUMERATOR MSS_THROTTLE_DENOMINATOR MSS_THROTTLE_CHANNEL_NUMERATOR MSS_THROTTLE_CHANNEL_DENOMINATOR MSS_WATT_TARGET MSS_POWER_SLOPE MSS_POWER_INT MSS_DIMM_MAXBANDWIDTH_GBS MSS_DIMM_MAXBANDWIDTH_MRS MSS_CHANNEL_MAXBANDWIDTH_GBS MSS_CHANNEL_MAXBANDWIDTH_MRS MSS_DIMM_MAXPOWER MSS_CHANNEL_MAXPOWER MSS_MEMSIZE_MBA unit-mcs-power8 unit TYPE MCS MSS_MEMSIZE unit-mcs-venice unit-mcs-power8 MODEL VENICE unit-mcs-salerno unit-mcs-power8 MODEL SALERNO unit-mcs-murano unit-mcs-power8 MODEL MURANO unit-mba-venice unit-mba-power8 MODEL VENICE unit-mba-salerno unit-mba-power8 MODEL SALERNO unit-mba-murano unit-mba-venice MODEL MURANO unit-mbs-venice unit-mbs-power8 MODEL VENICE unit-mbs-salerno unit-mbs-power8 MODEL SALERNO unit-mbs-murano unit-mbs-venice MODEL MURANO unit-memport-salerno unit-memport-power8 MODEL SALERNO unit-memport-venice unit-memport-power8 MODEL VENICE unit-memport-murano unit-memport-venice MODEL MURANO chip-membuf-centaur chip TYPE MEMBUF MODEL CENTAUR PRIMARY_CAPABILITIES supportsFsiScom1 supportsXscom0 supportsInbandScom1 reserved0 SCOM_SWITCHES useFsiScom1 useXscom0 useInbandScom0 reserved0 EEPROM_ADDR_INFO0 EEPROM_ADDR_INFO1 MSS_VOLT MSS_FREQ FSI_SCOM_MUTEX SCOM_IND_MUTEX FSI_GP_REG_SCOM_ACCESS 0 CHIP_HAS_SBE 0 unit-mbs-centaur unit-mbs-power8 PRIMARY_CAPABILITIES supportsFsiScom1 supportsXscom0 supportsInbandScom1 reserved0 MODEL CENTAUR unit-mba-centaur unit-mba-power8 PRIMARY_CAPABILITIES supportsFsiScom1 supportsXscom0 supportsInbandScom1 reserved0 MODEL CENTAUR unit-memport-centaur unit-memport-power8 PRIMARY_CAPABILITIES supportsFsiScom0 supportsXscom0 supportsInbandScom0 reserved0 MODEL CENTAUR card base CLASS CARD lcard-dimm card TYPE DIMM CLASS LOGICAL_CARD POSITION MBA_PORT MBA_DIMM EEPROM_ADDR_INFO0 lcard-dimm-jedec lcard-dimm MODELJEDEC CEN_DQ_TO_DIMM_CONN_DQ lcard-dimm-cdimm lcard-dimm MODELCDIMM