IS_MPIPL_HB
1 = in Memory Preserving IPL mode. 0 = in normal IPL mode.
volatile-zeroed
ATTR_IS_MPIPL
DIRECT
XSCOM_VIRTUAL_ADDR
Cached Virtual Address of Xscom memory space for this Chip
volatile-zeroed
FSI_MASTER_MUTEX
Mutex for FSI Master Operations
volatile-zeroed
HB_MUTEX_TEST_LOCK
Host boot mutex for testing
volatile-zeroed
I2C_ENGINE_MUTEX_0
Mutex for I2C Master engine 0
volatile-zeroed
I2C_ENGINE_MUTEX_1
Mutex for I2C Master engine 1
volatile-zeroed
I2C_ENGINE_MUTEX_2
Mutex for I2C Master engine 2
volatile-zeroed
FSI_SCOM_MUTEX
Mutex for FSI-based SCOM Operations
volatile-zeroed
SCOM_IND_MUTEX
Mutex for Indirect SCOM read operation
volatile-zeroed
SCAN_MUTEX
Mutex for SCAN operations
0
volatile-zeroed
SLW_IMAGE_ADDR
Location of runtime winkle image for this processor chip.
Written by host_build_winkle (istep 15.1)
volatile-zeroed
SLW_IMAGE_SIZE
Size of runtime winkle image for this processor chip.
Written by host_build_winkle (istep 15.1)
volatile-zeroed
IBSCOM_VIRTUAL_ADDR
Cached Virtual Address of Inband Scom memory space for this Chip
volatile-zeroed
IBSCOM_MUTEX
Mutex for Inband SCOM Operations
volatile-zeroed
IBSCOM_ENABLE_OVERRIDE
Used to force IBSCOM enabled for lab testing
volatile-zeroed
HB_EXISTING_IMAGE
Indicates which logical nodes have a hostboot image.
volatile-zeroed
HB_PM_SPWUP_OHA_FLAG
Flag storage to break the recursive calling loop for when accessing the OHA address space from the Special Wakeup procedure.
volatile-zeroed
ATTR_PM_SPWUP_OHA_FLAG
DIRECT