/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: src/usr/isteps/istep15/host_start_stop_engine.C $ */ /* */ /* OpenPOWER HostBoot Project */ /* */ /* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ /* You may obtain a copy of the License at */ /* */ /* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ /* Unless required by applicable law or agreed to in writing, software */ /* distributed under the License is distributed on an "AS IS" BASIS, */ /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ /* implied. See the License for the specific language governing */ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ //From Hostboot Directory ////Error handling and traces #include #include #include #include #include #include //HWP Invoker #include ////Targeting support #include #include //From Import Directory (EKB Repository) #include #include //Namespaces using namespace ERRORLOG; using namespace TARGETING; using namespace p9pm; using namespace fapi2; namespace ISTEP_15 { void* host_start_stop_engine (void *io_pArgs) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_start_stop_engine entry" ); ISTEP_ERROR::IStepError l_StepError; errlHndl_t l_errl __attribute__((unused)) = NULL; // Cast to void just to get around unused var warning if #ifdef's dont work // out to actually use the l_errl variable (void)l_errl; do { #ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS uint64_t l_writeData; size_t l_writeSize = sizeof(l_writeData); TARGETING::Target* l_proc = NULL; TARGETING::targetService().masterProcChipTargetHandle(l_proc); l_errl = deviceRead(l_proc, &l_writeData, l_writeSize, DEVICE_SCOM_ADDRESS(0x6C004)); if(l_errl) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_start_stop_engine: failed to read OIMR0 interrupt mask"); break; } #endif //Use targeting code to get a list of all processors TARGETING::TargetHandleList l_procChips; getAllChips( l_procChips, TARGETING::TYPE_PROC ); for (const auto & l_procChip: l_procChips) { //Convert the TARGETING::Target into a fapi2::Target by passing //l_procChip into the fapi2::Target constructor fapi2::Targetl_fapi2CpuTarget( (l_procChip)); TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Calling p9_pm_stop_gpe_init for 0x%.8X target", TARGETING::get_huid(l_procChip) ); //call p9_pm_stop_gpe_init.C HWP FAPI_INVOKE_HWP(l_errl, p9_pm_stop_gpe_init, l_fapi2CpuTarget, PM_INIT); if(l_errl) { ErrlUserDetailsTarget(l_procChip).addToLog(l_errl); l_StepError.addErrorDetails( l_errl ); errlCommit( l_errl, HWPF_COMP_ID ); TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_start_stop_engine:: failed on proc with HUID : %d",TARGETING::get_huid(l_procChip) ); } } #ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS // Starting SGPE in istep15.4 causes OIMR0 register to be improperly // reset, which breaks the xstop analysis flow during IPL. A hack // is to write the original contents of that register back if // the IPL checkstop flag is enabled. l_errl = deviceWrite(l_proc, &l_writeData, l_writeSize, DEVICE_SCOM_ADDRESS(0x6C004)); if(l_errl) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_start_stop_engine: failed to reset OIMR0 interrupt mask"); break; } #endif }while (0); TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_start_stop_engine exit" ); // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } };